5 FN7918.0 December 21, 2011 Rise/Fall Degradation (Propagation Delay), tPD
參數(shù)資料
型號： ISL54233IRUZ-T
廠商： Intersil
文件頁數(shù)： 14/18頁
文件大?。?/td> 0K
描述： IC INTERFACE
標準包裝： 3,000
功能： 多路復用器
電路： 1 x 3:1
導通狀態(tài)電阻： 15 歐姆
電壓電源： 單電源
電壓 - 電源，單路/雙路(±)： 2.7 V ~ 4.6 V
電流 - 電源： 6.5µA
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 12-UFQFN
供應商設備封裝： 12-uTQFN（2.2x1.4）
包裝： 帶卷 (TR)
ISL54233
5
FN7918.0
December 21, 2011
Rise/Fall Degradation (Propagation
Delay), tPD
VDD = 3.0V, RL = 45Ω, CL = 10pF, (see Figure 8)
25
-
250
-
ps
Crosstalk
VDD = 3.0V, RL = 50Ω, f = 240MHz
25
-
-36
-
dB
OFF-Isolation
VDD = 3.0V, RL = 50Ω, f = 240MHz
25
-
-32
-
dB
-3dB Bandwidth
Signal = 0dBm, 0.2VDC offset, RL = 50Ω
25
-
1.6
-
GHz
OFF Capacitance, CXD+OFF, CXD-OFF
f = 1MHz, VDD = 3.0V (see Figure 6)
25
-
3
-
pF
COM ON Capacitance, CCOM-(ON),
CCOM+(ON)
f = 1MHz, VDD = 3.0V (see Figure 6)
25
-
6
-
pF
COM ON Capacitance, CCOM-(ON),
CCOM+(ON)
f = 240MHz, VDD = 3.0V
25
-
2.8
-
pF
POWER SUPPLY CHARACTERISTICS
Power Supply Range, VDD
Full
2.7
4.6
V
Positive Supply Current, IDD
(ALL OFF Mode)
VDD = 3.6V, C1 = GND, C0 = GND
25
-
6.5
8
A
Full
-
15
A
Positive Supply Current, IDD
(USB1 Mode)
VDD = 3.6V, C1 = GND, C0 = VDD
25
-
6.5
8
A
Full
-
15
A
Positive Supply Current, IDD
(USB2 Mode)
VDD = 3.6V, C1 = VDD, C0 = GND
25
-
6.5
8
A
Full
-
15
A
Positive Supply Current, IDD
(USB3 Mode)
VDD = 3.6V, C0 = C1 = VDD
25
-
6.5
8
A
Full
-
15
A
Power OFF COMx Current, ICOMx
VDD = 0V, C0 = C1 = Float, COMx = 5.25V
25
-
1
A
Power OFF Logic Current, IC0, IC1
VDD = 0V, C0 = C1 = 5.25V
25
-
11
-
A
Power OFF D+/D- Current, IXD+, IXD-
VDD = 0V, C0 = C1 = Float, XD- = XD+ = 5.25V
25
-
5
-
A
DIGITAL INPUT CHARACTERISTICS
C0, C1 Voltage Low, VC0L, VC1L
VDD = 2.7V to 3.6V
Full
-
0.5
V
C0, C1 Voltage High, VC0H, VC1H
VDD = 2.7V to 3.6V
Full
1.4
-
5.25
V
C0, C1 Input Current, IC0L, IC1L
VDD = 3.6V, C0 = C1 = 0V or Float
Full
-50
6.2
50
nA
C0, C1 Input Current, IC0H, IC1H
VDD = 3.6V, C0 = C1 = 3.6V
Full
-2
1.6
2
A
C0, C1 Pull-Down Resistor, RCx
VDD = 3.6V, C0 = C1 = 3.6V, Measure current into C0 or C1 pin
and calculate resistance value.
Full
-
4
-
M
Ω
NOTES:
11. Vlogic = Input voltage to perform proper function.
12. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
13. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
14. Flatness is defined as the difference between maximum and minimum value of ON-resistance over the specified analog signal range.
15. Limits established by characterization and are not production tested.
16. rON matching between channels is calculated by subtracting the channel with the highest max rON value from the channel with lowest max rON value,
between 1D+ and 1D- or between 2D+ and 2D- or between 3D+ and 3D-.
Electrical Specifications - 2.7V to 3.6V Supply TestConditions: VDD=+3.0V,GND=0V,VC0H,VC1H=1.4V,VC0L,VC1L =0.5V,
(Note 11), Unless Otherwise Specified. Boldface limits apply over the operating temperature range, -40°C to +85°C. (Continued)
PARAMETER
TEST CONDITIONS
TEMP
(°C)
MIN
(Notes
12, 13)
TYP
MAX
(Notes
12, 13)
UNITS
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