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參數(shù)資料
| 型號： | ISL54417IRUZ-T |
| 廠商： | Intersil |
| 文件頁數(shù)： | 6/14頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC USB SWITCH DUAL SPDT 10UTQFN |
| 標(biāo)準(zhǔn)包裝： | 3,000 |
| 功能： | USB 開關(guān) |
| 電路： | 2 x SPDT |
| 導(dǎo)通狀態(tài)電阻： | 9 歐姆 |
| 電壓電源： | 單電源 |
| 電壓 - 電源，單路/雙路(±)： | 1.8 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 10-UFQFN |
| 供應(yīng)商設(shè)備封裝： | 10-UTQFN（2.1x1.6） |
| 包裝： | 帶卷 (TR) |
14
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN6318.1
June 27, 2006
ISL54415, ISL54416, ISL54417
Ultra Thin Quad Flat No-Lead Plastic Package (UTQFN)
6
B
E
A
D
0.10 C
2X
2
0.10 M C A B
0.05 M C
(ND-1) X e
C
0.05 C
A
0.10 C
A1
SEATING PLANE
e
INDEX AREA
PIN #1 ID
3
5
(DATUM A)
(DATUM B)
N-1
1
N
NX L
NX b
2
1
N
TOP VIEW
BOTTOM VIEW
SIDE VIEW
NX (b)
SECTION "C-C"
FOR ODD TERMINAL/SIDE
e
CC
5
C
L
TERMINAL TIP
(A1)
9 L
DETAIL “A” PIN 1 ID
L
0.05 MIN
0.10 MIN
0.10 C
2X
4xk
b
L10.2.1x1.6A
10 LEAD ULTRA THIN QUAD FLAT NO-LEAD PLASTIC
PACKAGE
SYMBOL
MILLIMETERS
NOTES
MIN
NOMINAL
MAX
A
0.45
0.50
0.55
-
A1
-
0.05
-
A3
0.127 REF
-
b
0.15
0.20
0.25
5, 9
D
2.05
2.10
2.15
-
E
1.55
1.60
1.65
-
e
0.50 BSC
-
k0.20
--
-
L
0.35
0.40
0.45
9
N10
2
Nd
4
3
Ne
1
3
θ
0-
12
4
Rev. 2 4/06
NOTES:
1. Dimensioning and tolerancing conform to ASME Y14.5-1994.
2. N is the number of terminals.
3. Nd and Ne refer to the number of terminals on D and E side,
respectively.
4. All dimensions are in millimeters. Angles are in degrees.
5. Dimension b applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
7. Maximum package warpage is 0.05mm.
8. Maximum allowable burrs is 0.076mm in all directions.
9. Nominal dimensions are provided to assist with PCB Land
Pattern Design efforts, see Intersil Technical Brief TB389.
10. Same as JEDEC MO-255UABD except:
No lead-pull-back, "A" MIN dimension = 0.45 not 0.50mm
"L" MAX dimension = 0.45 not 0.42mm.
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