Stability Considerations (See Figur" />
參數(shù)資料
型號: ISL55020IRZ
廠商: Intersil
文件頁數(shù): 11/11頁
文件大小: 0K
描述: IC AMP DIFF WIDEBAND 16-QFN
標準包裝: 90
放大器類型: 差分
電路數(shù): 1
輸出類型: 差分
轉換速率: 1200 V/µs
-3db帶寬: 300MHz
電流 - 輸入偏壓: 25µA
電壓 - 輸入偏移: 15000µV
電流 - 電源: 21mA
電流 - 輸出 / 通道: 150mA
電壓 - 電源,單路/雙路(±): 4.5 V ~ 12 V,±2.25 V ~ 6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-VQFN 裸露焊盤
供應商設備封裝: 16-QFN-EP(4x4)
包裝: 管件
9
FN6287.0
December 18, 2006
Feedback Resistor, Gain Bandwidth Product and
Stability Considerations (See Figure 18 - Basic
Application Schematic)
For gains greater than 1, the feedback resistor forms a pole
with the parasitic capacitance at the inverting input. As this
pole becomes lower in frequency, the amplifier's phase
margin is reduced. Excessive parasitic capacitance at the
input will cause excessive ringing in the time domain and
peaking in the frequency domain. High feedback resistor
values have the same effect, and therefore should be kept
as low as possible. Figure 5 shows the gain-peaking effect of
using higher feedback resistor values. Feedback resistor RF
has some maximum value that should not be exceeded for
optimum performance.
Unlike voltage feedback (VFA) amplifier topologies that
exhibit constant gain-bandwidth product, CFA amplifiers
maintain high bandwidth at gains high greater than 1.
Figure 3 illustrates the nearly constant bandwidth from a
single-ended gain (AVS) of 2.5 to 5, and only a slight
reduction out to a AVS of 50. For the gains other than 1,
optimum response is obtained with RF between 500Ω to
1k
Ω.
The high impedance inputs IN+ and IN- are sensitive
parasitic capacitance and inductance. To ensure input
stability, a small value resistor (200
Ω recommended) should
be placed as close to the device IN+ and IN- pins as
possible.
Driving Capacitive Loads and Cables
Excessive output capacitance also contributes to gain
peaking (Figure 2) and high overshoot in pulse applications.
For PC board layouts requiring long traces at the output, a
small series resistor (Figure 17 - RS+, RS- usually between
5
Ω to 50Ω) should be inserted as close to the device output
pin as possible to each to minimize peaking,. The resultant
gain error should be compensated with an appropriate
adjustment of RG.
When used as a cable driver, double termination is always
recommended for reflection-free performance. For those
applications, a back-termination series resistor (RS) at the
amplifier's output will isolate the amplifier from the cable and
allow extensive capacitive drive. However, other applications
may have high capacitive loads without a back-termination
resistor. Again, a small series resistor at the output can help
to reduce peaking.
Disable/Power-Down
The ISL55020 can be disabled with it’s outputs in a high
impedance state. The turn off time is about 250nS and the
turn on time is about 12nS (Figure 17). When disabled, the
amplifier's supply current is reduced to 1.4mA for IS+ and -
1.6mA for IS- typically. The amplifier's power down can be
controlled by standard ground-referenced CMOS signal
levels at the EN pin. V.
Output Drive Capability
The ISL55020 has no internal current-limiting circuitry. If the
output is shorted, it is possible to exceed the Absolute
Maximum Rating for output current or power dissipation,
potentially resulting in the destruction of the device.internal
short circuit protection.
Power Dissipation
With the high output drive capability of the ISL55020, It is
possible to exceed the +150°C absolute maximum junction
temperature under certain load current conditions.
Therefore, it is important to calculate the maximum junction
temperature for the application to determine if the load
conditions or package types need to be modified for the
amplifier to remain in the safe operating area.
A thermal shutdown circuit is included that implements a
thermal shutdown if the junction temperature exceeds
~+185°C. The thermal shutdown includes thermal hysteresis
of ~+15°C. The thermal shutdown feature is designed to
protect the device during accidental overload conditions and
continuous operation at junction temperatures greater than
+150°C should never be allowed.
The maximum power dissipation allowed in a package is
determined according to:
Where:
TJMAX = Maximum junction temperature
TAMAX = Maximum ambient temperature
θ
JA = Thermal resistance of the package
The maximum power dissipation actually produced by an IC
is the total quiescent supply current times the total power
supply voltage, plus the power in the IC due to the load, or:
Where:
VS = Total supply voltage
ISMAX = Maximum quiescent supply current per channel
ΔV
O = Maximum differential output voltage of the
application
RLD = Differential load resistance
ILOAD = Load current
By setting the two PDMAX equations equal to each other, we
can solve the output current and RLD to avoid the device
overheat.
PD
MAX
T
JMAX
T
AMAX
Θ
JA
---------------------------------------------
=
PD
V
S
I
SMAX
V
S
ΔV
O
R
LD
------------
×
+
×
=
ISL55020
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