參數(shù)資料
型號(hào): ISL55143IRZ-T
廠商: Intersil
文件頁(yè)數(shù): 5/14頁(yè)
文件大小: 0K
描述: IC COMP CMOS HS 18V 36-TQFN
標(biāo)準(zhǔn)包裝: 4,000
類型: 窗口
元件數(shù): 4
電壓 - 電源,單路/雙路(±): 10 V ~ 18 V
電壓 - 輸入偏移(最小值): 50mV @ -3V,12V
電流 - 輸入偏壓(最小值): 0.025µA @ -3V,12V
電流 - 靜態(tài)(最大值): 12.5mA
傳輸延遲(最大): 15ns
工作溫度: -40°C ~ 85°C
封裝/外殼: 36-WFQFN 裸露焊盤
安裝類型: 表面貼裝
包裝: 帶卷 (TR)
13
FN6230.3
April 4, 2013
ISL55141, ISL55142, ISL55143
Package Outline Drawing
M20.173
20 LEAD THIN SHRINK SMALL OUTLINE PACKAGE (TSSOP)
Rev 2, 5/10
DETAIL "X"
TYPICAL RECOMMENDED LAND PATTERN
TOP VIEW
SIDE VIEW
END VIEW
Dimension does not include mold flash, protrusions or gate burrs.
Mold flash, protrusions or gate burrs shall not exceed 0.15 per side.
Dimension does not include interlead flash or protrusion. Interlead
flash or protrusion shall not exceed 0.25 per side.
Dimensions are measured at datum plane H.
Dimensioning and tolerancing per ASME Y14.5M-1994.
Dimension does not include dambar protrusion. Allowable protrusion
shall be 0.08mm total in excess of dimension at maximum material
condition. Minimum space between protrusion and adjacent lead
is 0.07mm.
Dimension in ( ) are for reference only.
Conforms to JEDEC MO-153.
6.
3.
5.
4.
2.
1.
NOTES:
7.
0.09-0.20
SEE DETAIL "X"
(0.65 TYP)
(5.65)
(0.35 TYP)
0.90 +0.15/-0.10
0.60 ±0.15
0.15 MAX
0.05 MIN
PLANE
GAUGE
0°-8°
0.25
1.00 REF
(1.45)
20
0.20 C B A
2
1
3
9
B
1
3
10
A
PIN #1
I.D. MARK
6.50 ±0.10
6.40
4.40 ±0.10
0.65
0.10 C
SEATING
PLANE
0.25 +0.05/-0.06
5
C
H
- 0.05
1.20 MAX
0.10
C B A
M
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