參數(shù)資料
型號: ISL5629EVAL1
廠商: Intersil Corporation
英文描述: Dual 8-bit, +3.3V, 130/210MSPS, CommLink TM High Speed D/A Converter
中文描述: 雙8位,3.3伏,130/210MSPS,CommLink商標高速D / A轉(zhuǎn)換
文件頁數(shù): 11/12頁
文件大小: 644K
代理商: ISL5629EVAL1
11
Propagation Delay
The converter requires two clock rising edges for data to be
represented at the output. Each rising edge of the clock
captures the present data word and outputs the previous
data. The propagation delay is therefore 1/CLK, plus <2ns of
processing. See Figure 8.
Test Service
Intersil offers customer-specific testing of CommLink
converters with a service called Testdrive. To submit a
request, fill out the Testdrive form at
www.intersil.com/testdrive. Or, send a request to the
technical support center.
R
DIFF
ISL5629
R
LOAD
FIGURE 6. OUTPUT LOADING FOR DATASHEET
MEASUREMENTS
OUTA
OUTB
V
OUT
= (2 x OUTA x R
EQ
)V
1:1
L
OAD SEEN BY THE TRANSFORMER
R
LOAD
REPRESENTS THE
R
EQ
= 0.5 x (R
LOAD
// R
DIFF
)
AT EACH OUTPUT
FIGURE 7. ALTERNATIVE OUTPUT LOADING
Timing Diagram
ISL5629
OUTA
OUTB
V
OUT
= (2 x OUTA x R
EQ
)V
R
EQ
= 0.5 x (R
LOAD
// R
DIFF
// R
A
), WHERE R
A
=R
B
AT EACH OUTPUT
R
LOAD
R
DIFF
R
A
R
B
LOAD SEEN BY THE TRANSFORMER
R
LOAD
REPRESENTS THE
FIGURE 8. PROPAGATION DELAY, SETUP TIME, HOLD TIME AND MINIMUM PULSE WIDTH DIAGRAM
CLK
I
OUT
50%
t
PW1
t
PW2
t
SU
t
HLD
t
SU
t
SU
t
PD
t
HLD
t
HLD
D7-D0
W
0
W
1
W
2
W
3
OUTPUT=W
0
OUTPUT=W
1
t
PD
OUTPUT=W
-1
ISL5629
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