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參數(shù)資料
| 型號： | ISL5727EVAL1 |
| 廠商： | Intersil Corporation |
| 英文描述： | Dual 10-bit, +3.3V, 260+MSPS, High Speed D/A Converter |
| 中文描述： | 雙10位，3.3伏，260 MSPS的，高速D / A轉(zhuǎn)換 |
| 文件頁數(shù)： | 5/13頁 |
| 文件大小： | 672K |
| 代理商： | ISL5727EVAL1 |
5
Absolute Maximum Ratings
Thermal Information
Digital Supply Voltage DV
DD
to DGND . . . . . . . . . . . . . . . . . . +3.6V
Analog Supply Voltage AV
DD
to AGND. . . . . . . . . . . . . . . . . . +3.6V
Grounds, AGND TO DGND. . . . . . . . . . . . . . . . . . . . -0.3V to +0.3V
Digital Input Voltages (DATA, CLK, SLEEP) . . . . . . . . DV
DD
+ 0.3V
Reference Input Voltage Range. . . . . . . . . . . . . . . . . . AV
DD
+ 0.3V
Analog Output Current (I
OUT
) . . . . . . . . . . . . . . . . . . . . . . . . . 24mA
Operating Conditions
Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . . .-40
°
C to 85
°
C
Thermal Resistance (Typical, Note 1)
LQFP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . .150
°
C
Maximum Storage Temperature Range. . . . . . . . . . .-65
°
C to 150
°
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300
°
C
θ
JA
(
°
C/W)
70
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
AV
DD
= DV
DD
= +3.3V, V
REF
= Internal 1.2V, IOUTFS = 20mA, T
A
= 25°C for All Typical Values
PARAMETER
TEST CONDITIONS
T
A
= -40°C TO 85°C
UNITS
MIN
TYP
MAX
SYSTEM PERFORMANCE
Resolution
10
-
-
Bits
Integral Linearity Error, INL
“Best Fit” Straight Line (Note 8)
-0.5
±
0.1
+0.5
LSB
Differential Linearity Error, DNL
(Note 8)
-0.5
±
0.1
+0.5
LSB
Offset Error, I
OS
IOUTA (Note 8)
-0.006
+0.006
% FSR
Offset Drift Coefficient
(Note 8)
-
0.1
-
ppm
FSR/
°
C
Full Scale Gain Error, FSE
With External Reference (Notes 2, 8)
-3
±
0.5
+3
% FSR
With Internal Reference (Notes 2, 8)
-3
±
0.5
+3
% FSR
Full Scale Gain Drift
With External Reference (Note 8)
-
±
50
-
ppm
FSR/
°
C
With Internal Reference (Note 8)
-
±
100
-
ppm
FSR/
°
C
Crosstalk
f
CLK
= 100MSPS, f
OUT
= 10MHz
-
83
-
dB
f
CLK
= 100MSPS, f
OUT
= 40MHz
-
74
-
dB
f
CLK
= 260MSPS, f
OUT
= 40.4MHz
-
73
-
dB
Gain Matching Between Channels
(DC Measurement)
As a percentage of Full Scale Range
-1.6
0.6
+1.6
% FSR
In dB Full Scale Range
-0.14
0.05
+0.14
dB FSR
Full Scale Output Current, I
FS
2
20
22
mA
Output Voltage Compliance Range
(Note 3)
-1.0
-
1.25
V
DYNAMIC CHARACTERISTICS
Maximum Clock Rate, f
CLK
260
300
-
MHz
Output Rise Time
Full Scale Step
-
1
-
ns
Output Fall Time
Full Scale Step
-
1
-
ns
Output Capacitance
-
5
-
pF
Output Noise
IOUTFS = 20mA
-
50
-
pA/
√
Hz
IOUTFS = 2mA
-
30
-
pA/
√
Hz
ISL5727
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