參數(shù)資料
型號: ISL59112IEZ-EVALZ
廠商: Intersil
文件頁數(shù): 7/8頁
文件大?。?/td> 0K
描述: EVAL BOARD FOR ISL59112IEZ
標(biāo)準(zhǔn)包裝: 1
系列: *
7
FN6142.4
March 15, 2007
Power Supply Bypassing Printed Circuit Board
Layout
As with any modern operational amplifier, a good printed
circuit board layout is necessary for optimum performance.
Lead lengths should be as short as possible. The power
supply pin must be well bypassed to reduce the risk of
oscillation. For normal single supply operation, where the
VS- pin is connected to the ground plane, a single 4.7F
tantalum capacitor in parallel with a 0.1F ceramic capacitor
from VS+ to GND will suffice. This same capacitor
combination should be placed at each supply pin to ground if
split supplies are to be used. In this case, the VS- pin
becomes the negative supply rail.
Printed Circuit Board Layout
For good AC performance, parasitic capacitance should be
kept to minimum. Use of wire wound resistors should be
avoided because of their additional series inductance. Use
of sockets should also be avoided if possible. Sockets add
parasitic inductance and capacitance that can result in
compromised performance. Minimizing parasitic capacitance
at the amplifier's inverting input pin is very important. The
feedback resistor should be placed very close to the
inverting input pin. Strip line design techniques are
recommended for the signal traces.
ISL59112
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