參數(shù)資料
型號: ISL59483IRZ-T13
廠商: INTERSIL CORP
元件分類: 運(yùn)動控制電子
英文描述: Dual, 500MHz Triple, Multiplexing Amplifiers
中文描述: TRIPLE 2-CHANNEL, VIDEO MULTIPLEXER, PQCC48
封裝: 7 X 7 MM, ROHS COMPLIANT, PLASTIC, QFN-48
文件頁數(shù): 16/17頁
文件大?。?/td> 909K
代理商: ISL59483IRZ-T13
16
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Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN6394.1
December 22, 2006
4:1 RGB Dual Gain Video MUX
Connecting the MUX inputs and outputs in parallel allows the
8 channel ISL59483 to be used as a 4:1 RGB MUX with
selectable gains of 1 or 2 (Figure 10). In this example, the high
input impedance of the MUX enables each input video line to
be shared by any number of MUX input pins. The gain select
logic function is created by providing complememtary logic to
the HIZ1 and HIZ2 pins. Channels CH0 through CH3 are
selected by connecting the MUX 1 and MUX 2 S0-1, 2 and
S1-1, 2 channel select inputs together to form channel select
(S0 and S1), as shown in the truth table in Figure 10.
FIGURE 45. APPLICATION CIRCUIT FOR DUAL GAIN 4:1 VIDEO MUX
S1
S1
GAIN
SELECT
GAIN
OUTA, B, C
0
0
0
1
CH0A, B, C
0
0
0
1
CH1A, B, C
1
1
0
1
CH2A, B, C
1
1
0
1
CH3A, B, C
0
0
1
2
CH0A, B, C
0
0
1
2
CH1A, B, C
1
1
1
2
CH2A, B, C
1
1
1
2
CH3A, B, C
+2
+1
ISL59483
1/3 MUX-AMP1
1/3 MUX-AMP2
OUTA1
IN0A1
OUTA2
IN1A2
IN1A1
IN2A1
IN3A1
IN0A2
IN2A2
IN3A2
S0-1
S1-1
HIZ1
S0-2
S1-2
HIZ2
CH0 - CH3
CHANNEL SELECT
AND GAIN SELECT
LOGIC INPUTS
CHANNELS B & C
NOT SHOWN
S0
S1
CH0
CH1
CH2
CH3
CHANNEL SELECT TRUTH TABLE
DUAL GAIN 4:1 VIDEO MUX
CONTROL
LOGIC
OUT
GAIN
SELECT
* R
OUTA1
* R
OUTA2
* OPTIONAL - DEPENDING ON PARASITIC CAPACITANCE
CONTROL
LOGIC
ISL59483
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