SFDR to Nyquist (fCLK/2) f
參數(shù)資料
型號： ISL5961IAZ
廠商： Intersil
文件頁數(shù)： 9/13頁
文件大小： 0K
描述： CONV D/A 14-BIT 3.3V 28-TSSOP
標準包裝： 50
位數(shù)： 14
數(shù)據(jù)接口： 并聯(lián)
轉(zhuǎn)換器數(shù)目： 1
電壓電源： 模擬和數(shù)字
功率耗散（最大）： 120mW
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 28-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 28-TSSOP
包裝： 管件
輸出數(shù)目和類型： 2 電流，單極
采樣率（每秒）： 150M
5
Spurious Free Dynamic Range,
SFDR to Nyquist (fCLK/2)
fCLK = 210MSPS, fOUT = 80.8MHz (Notes 4, 7)
-
52
-
dBc
fCLK = 210MSPS, fOUT = 40.4MHz (Notes 4, 7, 9)
-
61
-
dBc
fCLK = 200MSPS, fOUT = 20.2MHz, T = 25
oC (Notes 4, 7)
62
64
-
dBc
fCLK = 200MSPS, fOUT = 20.2MHz, T = -40
oC to 85oC (Notes 4, 7)
60
-
dBc
fCLK = 130MSPS, fOUT = 50.5MHz (Notes 4, 7)
-
59
-
dBc
fCLK = 130MSPS, fOUT = 40.4MHz (Notes 4, 7)
-
63
-
dBc
fCLK = 130MSPS, fOUT = 20.2MHz (Notes 4, 7)
-
70
-
dBc
fCLK = 130MSPS, fOUT = 10.1MHz (Notes 4, 7)
-
75
-
dBc
fCLK = 130MSPS, fOUT = 5.05MHz, T = 25
oC (Notes 4, 7)
72
79
-
dBc
fCLK = 130MSPS, fOUT = 5.05MHz, T = -40
oC to 85oC (Notes 4, 7)
70
-
dBc
fCLK = 100MSPS, fOUT = 40.4MHz (Notes 4, 7)
-
61
-
dBc
fCLK = 80MSPS, fOUT = 30.3MHz (Notes 4, 7)
-
65
-
dBc
fCLK = 80MSPS, fOUT = 20.2MHz (Notes 4, 7)
-
71
-
dBc
fCLK = 80MSPS, fOUT = 10.1MHz (Notes 4, 7, 9)
-
71
-
dBc
fCLK = 80MSPS, fOUT = 5.05MHz (Notes 4, 7)
-
78
-
dBc
fCLK = 50MSPS, fOUT = 20.2MHz (Notes 4, 7)
-
70
-
dBc
fCLK = 50MSPS, fOUT = 10.1MHz (Notes 4, 7)
-
75
-
dBc
fCLK = 50MSPS, fOUT = 5.05MHz (Notes 4, 7)
-
79
-
dBc
Spurious Free Dynamic Range,
SFDR in a Window with Eight Tones
fCLK = 210MSPS, fOUT = 28.3MHz to 45.2MHz, 2.1MHz Spacing,
50MHz Span (Notes 4, 7, 9)
-67
-
dBc
fCLK = 130MSPS, fOUT =17.5MHz to 27.9MHz, 1.3MHz Spacing,
35MHz Span (Notes 4, 7)
-70
-
dBc
fCLK = 80MSPS, fOUT = 10.8MHz to 17.2MHz, 811kHz Spacing,
15MHz Span (Notes 4, 7)
-77
-
dBc
fCLK = 50MSPS, fOUT = 6.7MHz to 10.8MHz, 490kHz Spacing,
10MHz Span (Notes 4, 7)
-78
-
dBc
Spurious Free Dynamic Range,
SFDR in a Window with EDGE or GSM
fCLK = 78MSPS, fOUT = 11MHz, in a 20MHz Window, RBW=30kHz
(Notes 4, 7, 9)
-94
-
dBc
Adjacent Channel Power Ratio,
ACPR with UMTS
fCLK = 76.8MSPS, fOUT = 19.2MHz, RBW=30kHz (Notes 4, 7, 9)
-
71
-
dB
VOLTAGE REFERENCE
Internal Reference Voltage, VFSADJ
Pin 18 Voltage with Internal Reference
1.2
1.23
1.3
V
Internal Reference Voltage Drift
-
±40
-
ppm/oC
Internal Reference Output Current
Sink/Source Capability
Reference is not intended to be externally loaded
-
0
-
A
Reference Input Impedance
-1
-
M
Reference Input Multiplying Bandwidth (Note 7)
-
1.0
-
MHz
DIGITAL INPUTS
D13-D0, CLK
Input Logic High Voltage with
3.3V Supply, VIH
(Note 3)
2.3
3.3
-
V
Input Logic Low Voltage with
3.3V Supply, VIL
(Note 3)
-
0
1.0
V
Sleep Input Current, IIH
-25
-
+25
A
Electrical Specifications
AVDD = DVDD = +3.3V, VREF = Internal 1.2V, IOUTFS = 20mA, TA = 25
oC for All Typical Values (Continued)
PARAMETER
TEST CONDITIONS
TA = -40
oC TO 85oC
UNITS
MIN
TYP
MAX
ISL5961
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