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    參數(shù)資料
    型號(hào): ISL6141IB
    廠商: INTERSIL CORP
    元件分類: 電源管理
    英文描述: Negative Voltage Hot Plug Controller
    中文描述: 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO8
    封裝: PLASTIC, MS-012AA, SOIC-8
    文件頁數(shù): 17/19頁
    文件大?。?/td> 428K
    代理商: ISL6141IB
    17
    The brick’s output capacitance is also determined by the
    system, including load regulation considerations. However, it
    can affect the ISL6141/51, depending upon how it is
    enabled. For example, if the PWRGD signal is not used to
    enable the brick, the following could occur. Sometime during
    the inrush current time, as the main power supply starts
    charging the brick input capacitors, the brick itself will start
    working, and start charging its output capacitors and load;
    that current has to be added to the inrush current. In some
    cases, the sum could exceed the Over-Current shutdown,
    which would shut down the whole system! Therefore,
    whenever practical, it is advantageous to use the PWRGD
    output to keep the brick off at least until the input caps are
    charged up, and then start-up the brick to charge its output
    caps.
    Typical brick regulators include models such as Lucent
    JW050A1-E or Vicor VI-J30-CY. These are nominal -48V
    input, and 5V outputs, with some isolation between the input
    and output.
    Applications: Optional Components
    In addition to the typical application, and the variations
    already mentioned, there are a few other possible
    components that might be used in specific cases. See Figure
    34 for some possibilities.
    If the input power supply exceeds the 100V absolute
    maximum rating, even for a short transient, that could cause
    permanent damage to the IC, as well as other components
    on the board. If this cannot be guaranteed, a voltage
    suppressor (such as the SMAT70A, D1) is recommended.
    When placed from V
    DD
    to V
    EE
    on the board, it will clamp the
    voltage.
    If transients on the input power supply occur when the
    supply is near either the OV or UV trip points, the GATE
    could turn on or off momentarily. One possible solution is to
    add a filter cap C4 to the V
    DD
    pin, through isolation resistor
    R10. A large value of R10 is better for the filtering, but be
    aware of the voltage drop across it. For example, a 1k
    resistor, with 2.4mA of I
    DD
    would have 2.4V across it and
    dissipate 2.4mW. Since the UV and OV comparators are
    referenced with respect to the V
    EE
    supply, they should not
    be affected. But the GATE clamp voltage could be offset by
    the voltage across the extra resistor.
    The switch SW1 is shown as a simple push button. It can be
    replaced by an active switch, such as an NPN or NFET; the
    principle is the same; pull the UV node below its trip point,
    and then release it (toggle low). To connect an NFET, for
    example, the DRAIN goes to UV; the source to V
    EE
    , and the
    GATE is the input; if it goes high (relative to V
    EE
    ), it turns the
    NFET on, and UV is pulled low. Just make sure the NFET
    resistance is low compared to the resistor divider, so that it
    has no problem pulling down against it.
    R8 is a pull-up resistor for PWRGD, if there is no other
    component acting as a pull-up device. The value of R8 is
    determined by how much current is needed when the pin is
    pulled low (also affected by the V
    DD
    voltage); and it should
    be pulled low enough for a good logic low level. An LED can
    also be placed in series with R8, if desired. In that case, the
    criteria is the LED brightness versus current.
    ISL6141 (L)
    V
    DD
    UV
    OV
    V
    EE
    SENSE
    GATE
    DRAIN
    PWRGD
    R1
    Q1
    C1
    R2
    R3
    C2
    R4
    D1*
    SW1*
    R8*
    CL*
    C4*
    GND
    GND
    -V IN
    -V OUT
    R10*
    R5
    R6
    GND
    G
    NFET*
    (INSTEAD
    OF SW1)
    FIGURE 34. ISL6141/51 OPTIONAL COMPONENTS (SHOWN WITH *)
    ISL6141, ISL6151
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