參數(shù)資料
型號(hào)： ISL6226
廠商： Intersil Corporation
元件分類： 基準(zhǔn)電壓源/電流源
英文描述： Advanced PWM and Linear Power Controller for Portable Applications
中文描述： 先進(jìn)的PWM和線性電源控制器，用于便攜式應(yīng)用
文件頁(yè)數(shù)： 14/17頁(yè)
文件大小： 384K
代理商： ISL6226
14
Feedback Loop Compensation
To reduce the number of external components and remove
the burden of determining compensation components from a
system designer, PWM controller has internally
compensated error amplifiers. To make internal
compensation possible several design measures where
taken.
First, the ramp signal applied to the PWM comparator is
proportional to the input voltage provided via the VIN pin as
shown in Figure 7. Second, the load current proportional
signal is derived from the voltage drop across the lower
MOSFET during on time of lower MOSFET. This signal is
added to the amplifier error signal on the comparator input.
This effectively creates an internal current control loop.
Because of current loop, a compensation network with one
zero and two poles is usually sufficient. One pole is place at
origin which has high DC gain. The zero is place around
9kHz, and another pole is around 137kHz. The zero-pole
pair causes a flat gain region at frequencies in between the
zero and the pole. This region is also make the phase bump
or reduce phase shift. The amount of phase shift reduction
depends on how wide the region of flat gain and has
maximum value of 90
o
.
Low Drop Out Linear Regulator
The linear has separate Enable, Pgood and Soft Start pins
from the PWM. The linear also has over current and under
voltage protection features.
The over current protection will shut down the LDO controller
when the voltage between pin 8 and 9 is more 100mV. The
LDO controller will automatic restart again when the voltage
is less than 100mV. Intersil recommend to use this feature to
protect the ISL6226 IC otherwise the IC will damage when
over current happen.
The under voltage protection will start when the output
voltage is 26% lower than the nominal output voltage.
The ISL6226 has an internal P-channel MOSFET pass
transistor. This provides several advantages over PNP pass
transistor. PNP regulator waste considerable amounts of
current in dropout when the pass transistor saturates. The P-
channel MOSFET requires no base drive current which
reduces quiescent current.
Output Voltage Calculation
Figure 10 describe the output voltage which relative to the
bias voltage. Due to the over current protection circuitry
works properly, the internal P-channel MOSFET has an
approximate 0.5V drop cross it. Therefore, the maximum
voltage at LINDR pin will be.
VLINDR
=
The maximum output voltage equals to the voltage at LINDR
pin minus the diode drop voltage of between the base and
emitter of NPN transistor device and minus 100mV across
pin 8 and 9. In the case of using MOSFET instead of NPN
transistor, the maximum output voltage equals to the voltage
at LINDR pin minus the gate threshold voltage of MOSFET
and minus 100mV across pin 8 and 9.
Output Current
The LDO controller is capable of sourcing 50mA out of
LINDR pin. This amount of current is used to drive the NPN
transistor or as load current up to 50mA. The output current
of the system equals the current out of LINDR pin times the
current gain of NPN transistor ( , Beta).
Component Selection Guidelines
LDO Device Considerations
The NPN transistor or MOSFET should be chosen to carry
the load current and power dissipation required by the
conditions of the load current and voltage drop across the
device.
Output Capacitor Selection-LDO
For stable operation, the output current up to 50mA or
without the external device, a minimum output capacitor
value of 4.7
μ
F is recommended. The design simulation
results indicated that the phase margins vary from 70 degree
to 90 degree while the output currents vary from 5
μ
A to
50mA, respectively. The higher output capacitance indicates
the higher phase margin.
For stable operation with the external device, a minimum
output capacitor value of 220
μ
F is recommended. Larger
capacitor values provide better transient response. A
capacitor value of 330
μ
F, such as SANYO POSCAP
6TPB330M, will provide good phase margin and better
transient response.
Output Capacitor Selection-PWM
The output capacitors have unique requirements. In general,
the output capacitors should be selected to meet the
dynamic regulation requirements including ripple voltage
and load transients.
VCC
0.5V
–
FIGURE 10.
LDO
LINDR
VCC
PMOS
Internal IC
External IC
V
IN
C
E
B
LINCS1
LINCS2
Vout
β
ISL6226
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