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參數(shù)資料
| 型號(hào)： | ISL6235 |
| 廠商： | Intersil Corporation |
| 英文描述： | Octal D-Type Transparent Latches With 3-State Outputs 20-SOIC -40 to 85 |
| 中文描述： | 只有先進(jìn)的三重的PWM模式和雙線性電源控制器，用于便攜式應(yīng)用 |
| 文件頁數(shù)： | 12/14頁 |
| 文件大?。?/td> | 441K |
| 代理商： | ISL6235 |
12
Layout Considerations
MOSFETs switch very fast and efficiently. The speed with
which the current transitions from one device to another
causes voltage spikes across the interconnecting impedances
and parasitic circuit elements. The voltage spikes can
degrade efficiency, radiate noise into the circuit, and lead to
device overvoltage stress. Careful component layout and
printed circuit design minimizes the voltage spikes in the
converter. Consider, as an example, the turn-off transition of
one of the upper PWM MOSFETs. Prior to turn-off, the upper
MOSFET is carrying the full load current. During the turn-off,
current stops flowing in the upper MOSFET and is picked up
by the lower MOSFET. Any inductance in the switched current
path generates a voltage spike during the switching interval.
Careful component selection, tight layout of the critical
components, and short, wide circuit traces minimize the
magnitude of voltage spikes. See the Application Note for the
evaluation board component placement and the printed circuit
board layout details.
There are two sets of critical components in a DC-DC
converter using an ISL6235 controller. The switching power
components are the most critical because they switch large
amounts of energy, and as such, they tend to generate
equally large amounts of noise. The critical small signal
components are those connected to sensitive nodes or
those supplying critical bias currents.
Power Components Layout Considerations
The power components and the controller IC should be
placed first. Locate the input capacitors, especially the high-
frequency ceramic decoupling capacitors, close to the power
MOSFETs. Locate the output inductor and output capacitors
between the MOSFETs and the load. Locate the PWM
controller close to the MOSFETs.
Insure the current paths from the input capacitors to the
MOSFETs, to the output inductors and output capacitors are
as short as possible with maximum allowable trace widths.
A multi-layer printed circuit board is recommended. Dedicate
one solid layer for a ground plane and make all critical
component ground connections with vias to this layer.
Dedicate another solid layer as a power plane and break this
plane into smaller islands of common voltage levels. The
power plane should support the input power and output power
nodes. Use copper filled polygons on the top and bottom
circuit layers for the phase nodes, but do not unnecessarily
oversize these particular islands. Since the phase nodes are
subjected to very high dV/dt voltages, the stray capacitor
formed between these islands and the surrounding circuitry
will tend to couple switching noise. Use the remaining printed
circuit layers for small signal wiring. The wiring traces from the
control IC to the MOSFET gate and source should be sized to
carry 2A peak currents.
Small Components Signal Layout Considerations
1. The VSNS1 and VSNS2 inputs should be bypassed with
a 1.0
μ
F capacitor close to their respective IC pins.
2. A ‘T’ filter consisting of a ‘split’ RSNS and a small, 100pF,
capacitor as shown in Figure 5, may be helpful in
reducing noise coupling into the ISEN input. For example,
if the calculated value of RSNS1 is 2.2K
, dividing it as
shown with a 100pF capacitor provides filtering without
changing the current limit set point. For any calculated
value of RSNS, keep the value of the R9 portion to
approximately 200
, and the remainder of the
resistance in the R19 position. The 200
resistor and
100pF capacitor provide effective filtering for noise
above 8MHz.
This filter configuration may be helpful on both the 3.3V and
5V Main outputs.
3. The bypass capacitors for VBATT and the soft-start
capacitors, C
SS1
and C
SS2
should be located close to
their connecting pins on the control IC. Minimize any
leakage current paths from SDWN1 and SDWN2 nodes,
since the internal current source is only 5mA.
4. Refer to the Application Note for a recommended
component placement and interconnections.
Figure 6 shows an application circuit of a power supply for a
notebook PC microprocessor system. The power supply
provides +5V ALWAYS, +3.3V ALWAYS, +5.0V, +3.3V, and
12V from +5.6-22V
DC
battery voltage. For detailed
information on the circuit, including a Bill of Materials and
circuit board description, see Application Note AN9915. Also
see Intersil’s web site (www.intersil.com) for the latest
information.
ISEN1
R19
2K
R9
200
C12
100pF
FROM PHASE
NODE
RSNS = R19 + R9
FIGURE 5.
NOISE FILTER FOR ISEN1 INPUT
ISL6235
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PDF描述 |
|---|---|
| ISL6235CA | Octal D-Type Transparent Latches With 3-State Outputs 20-SOIC -40 to 85 |
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| ISL6244HR-T | Test Probe; Range:-32deg to 500degF RoHS Compliant: NA |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ISL6235CA | 制造商:Rochester Electronics LLC 功能描述:SYSTEM ELECTRONICS REGULATOR FOR LCD-PC - Bulk |
| ISL6235CA-T | 制造商:Rochester Electronics LLC 功能描述:- Tape and Reel |
| ISL6236 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:High-Efficiency, Quad-Output, Main Power Supply Controllers for Notebook Computers |
| ISL6236A | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:High-Efficiency, Quad-Output, Main Power Supply Controllers for Notebook Computers |
| ISL6236AIRZ | 功能描述:IC MAIN PWR CTRLR QUAD 32-QFN RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - 專用型 系列:- 標(biāo)準(zhǔn)包裝:43 系列:- 應(yīng)用:控制器，Intel VR11 輸入電壓:5 V ~ 12 V 輸出數(shù):1 輸出電壓:0.5 V ~ 1.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:48-QFN（7x7） 包裝:管件 |
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