參數(shù)資料
型號: ISL6244CR
廠商: INTERSIL CORP
元件分類: 穩(wěn)壓器
英文描述: Octal D-Type Transparent Latches With 3-State Outputs 20-SOIC -40 to 85
中文描述: SWITCHING CONTROLLER, 1000 kHz SWITCHING FREQ-MAX, PQCC32
封裝: 5 X 5 MM, PLASTIC, MO-220-VHHD, QFN-32
文件頁數(shù): 22/25頁
文件大小: 845K
代理商: ISL6244CR
22
FN9106.3
December 28, 2004
Figures 29 and 30 provide the same input RMS current
information for three and four phase designs respectively.
Use the same approach to selecting the bulk capacitor type
and number as described above.
Low capacitance, high-frequency ceramic capacitors are
needed in addition to the bulk capacitors to suppress leading
and falling edge voltage spikes. The result from the high
current slew rates produced by the upper MOSFETs turn on
and off. Select low ESL ceramic capacitors and place one as
close as possible to each upper MOSFET drain to minimize
board parasitics and maximize suppression.
MULTIPHASE RMS IMPROVEMENT
Figure 31 is provided as a reference to demonstrate the
dramatic reductions in input-capacitor RMS current upon the
implementation of the multiphase topology.
For example, compare the input rms current requirements of
a two-phase converter versus that of a single phase.
Assume both converters have a duty cycle of 0.25,
maximum sustained output current of 40A, and a ratio of
I
C,PP
to I
O
of 0.5. The single phase converter would require
17.3 Arms current capacity while the two-phase converter
would only require 10.9 Arms. The advantages become
even more pronounced when output current is increased
and additional phases are added to keep the component
cost down relative to the single phase approach.
Layout Considerations
Printed circuit board (PCB) layout is very important in high
frequency switching converter design. With components
switching at greater than 200kHz, the resulting current
transitions from one device to another cause voltage spikes
across the interconnecting impedances and parasitic circuit
elements. These voltage spikes can degrade efficiency, lead
to device over-voltage stress, radiate noise into sensitive
nodes, and increase thermal stress on critical components.
Careful component placement and PCB layout minimizes
the voltage spikes in the converter.
The following multi-layer printed circuit board layout
strategies minimize the impact of board parasitics on
converter performance and optimize the heat-dissipating
capabilities of the printed-circuit board. This section
highlights some important practices which should not be
overlooked during the layout process.
Component Placement
Determine the total implementation area and orient the
critical switching components first. Symmetry is very
important in multiphase converter placement and the
switching components dictate how the available space is
filled. The switching components carry large amounts of
energy and tend to generate high levels of noise. A tight
layout of the output inductors and MOSFETs with short, wide
DUTY CYCLE (V
IN/
V
O
)
FIGURE 29. NORMALIZED INPUT-CAPACITOR RMS
CURRENT vs DUTY CYCLE FOR 3-PHASE
CONVERTER
0
0.4
1.0
0.2
0.6
0.8
I
R
I
O
)
0.3
0.1
0
0.2
I
C,PP
= 0
I
C,PP
= 0.25 I
O
I
C,PP
= 0.5 I
O
I
C,PP
= 0.75 I
O
I
R
I
O
)
FIGURE 30. NORMALIZED INPUT-CAPACITOR RMS
CURRENT vs DUTY CYCLE FOR 4-PHASE
CONVERTER
0
0.4
1.0
0.2
0.6
0.8
DUTY CYCLE (V
IN/
V
O
)
0.3
0.1
0
0.2
I
C,PP
= 0
I
C,PP
= 0.25 I
O
I
C,PP
= 0.5 I
O
I
C,PP
= 0.75 I
O
FIGURE 31. NORMALIZED INPUT-CAPACITOR RMS
CURRENT vs DUTY CYCLE FOR SINGLE-PHASE
CONVERTER
0
0.4
1.0
0.2
0.6
0.8
DUTY CYCLE (V
IN/
V
O
)
I
R
I
O
)
0.6
0.2
0
0.4
I
C,PP
= 0
I
C,PP
= 0.5 I
O
I
C,PP
= 0.75 I
O
ISL6244
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ISL6244CRZ Octal D-Type Transparent Latches With 3-State Outputs 20-PDIP -40 to 85
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