參數(shù)資料
型號: ISL6545AEVAL1
廠商: Intersil Corporation
英文描述: 5V or 12V Single Synchronous Buck Pulse-Width Modulation (PWM) Controller
中文描述: 單5V或12V同步降壓脈寬調(diào)制(PWM)控制器
文件頁數(shù): 8/16頁
文件大小: 302K
代理商: ISL6545AEVAL1
www.DataSheet4U.com
8
FN6305.3
November 15, 2006
The overcurrent function will trip at a peak inductor current
(I
PEAK)
determined by:
where I
OCSET
is the internal OCSET current source (21.5
μ
A
typical). The scale factor of 2 doubles the trip point of the
MOSFET voltage drop, compared to the setting on the
R
OCSET
resistor. The OC trip point varies in a system mainly
due to the MOSFET’s r
DS(ON)
variations (over process,
current and temperature). To avoid overcurrent tripping in
the normal operating load range, find the R
OCSET
resistor
from the equation above with:
1. The maximum r
DS(ON)
at the highest junction
temperature.
2. The minimum I
OCSET
from the specification table.
3. Determine I
PEAK
for
where
Δ
I is the output inductor ripple current.
For an equation for the ripple current see
Output Inductor
Selection
.
,
The range of allowable voltages detected (2 * I
OCSET
*
R
OCSET
) is 0 to 475mV; but the practical range for typical
MOSFETs is typically in the 20 to 120mV ballpark (500 to
3000
Ω
). If the voltage drop across R
OCSET
is set too low,
that can cause almost continuous OCP tripping and retry. It
would also be very sensitive to system noise and inrush
current spikes, so it should be avoided. The maximum
usable setting is around 0.2V across R
OCSET
(0.4V across
the MOSFET); values above that might disable the
protection. Any voltage drop across R
OCSET
that is greater
than 0.3V (0.6V MOSFET trip point) will disable the OCP.
The preferred method to disable OCP is simply to remove
the resistor; that will be detected that as no OCP.
Note that conditions during power-up or during a retry may
look different than normal operation. During power-up in a
12V system, the IC starts operation just above 4V; if the
supply ramp is slow, the soft-start ramp might be over well
before 12V is reached. So with lower gate drive voltages, the
r
DS(ON)
of the MOSFETs will be higher during power-up,
effectively lowering the OCP trip. In addition, the ripple
current will likely be different at lower input voltage.
Another factor is the digital nature of the soft-start ramp. On
each discrete voltage step, there is in effect a small load
transient, and a current spike to charge the output
capacitors. The height of the current spike is not controlled; it
is affected by the step size of the output, the value of the
output capacitors, as well as the IC error amp compensation.
So it is possible to trip the overcurrent with inrush current, in
addition to the normal load and ripple considerations.
Figure 5 shows the output response during a retry of an
output shorted to GND. At time T0, the output has been
turned off, due to sensing an overcurrent condition. There
are two internal soft-start delay cycles (T1 and T2) to allow
the MOSFETs to cool down, to keep the average power
dissipation in retry at an acceptable level. At time T2, the
output starts a normal soft-start cycle, and the output tries to
ramp. If the short is still applied, and the current reaches the
OCSET trip point any time during soft-start ramp period, the
output will shut off, and return to time T0 for another delay
cycle. The retry period is thus two dummy soft-start cycles
plus one variable one (which depends on how long it takes to
trip the sensor each time). Figure 5 shows an example
where the output gets about half-way up before shutting
down; therefore, the retry (or hiccup) time will be around
17ms. The minimum should be nominally 13.6ms and the
maximum 20.4ms. If the short condition is finally removed,
the output should ramp up normally on the next T2 cycle.
Starting up into a shorted load looks the same as a retry into
that same shorted load. In both cases, OCP is always
enabled during soft-start; once it trips, it will go into retry
(hiccup) mode. The retry cycle will always have two dummy
time-outs, plus whatever fraction of the real soft-start time
passes before the detection and shutoff; at that point, the
logic immediately starts a new two dummy cycle time-out.
Output Voltage Selection
The output voltage can be programmed to any level between
the 0.6V internal reference, up to the V
IN
supply. The
ISL6545 can run at near 100% duty cycle at zero load, but
the r
DS(ON)
of the upper MOSFET will effectively limit it to
something less as the load current increases. In addition, the
OCP (if enabled) will also limit the maximum effective duty
cycle.
An external resistor divider is used to scale the output
voltage relative to the internal reference voltage, and feed it
back to the inverting input of the error amp. See the Typical
I
PEAK
2
-----------------r
I
DS ON
×
xR
OCSET
)
=
I
PEAK
I
OUT MAX
(
)
I
2
(
----------
)
+
>
FIGURE 5. OVERCURRENT RETRY OPERATION
6.8ms
6.8ms
0 - 6.8ms
6.8ms
T0
T1
T2
T0
V
OUT
(0.5V/DIV)
internal soft-start ramp
GND>
T1
ISL6545, ISL6545A
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