參數(shù)資料
型號: ISL6548
廠商: Intersil Corporation
英文描述: ACPI Regulator/Controller for Dual Channel DDR Memory Systems
中文描述: ACPI的穩(wěn)壓器/雙通道DDR內存控制器系統(tǒng)
文件頁數(shù): 11/15頁
文件大小: 464K
代理商: ISL6548
11
FN9188.1
February 9, 2005
critical because they switch large amounts of energy, and
therefore tend to generate large amounts of noise. Next are
the small signal components which connect to sensitive
nodes or supply critical bypass current and signal coupling.
A multi-layer printed circuit board is recommended. Figure 2
shows the connections of the critical components in the
converter. Note that capacitors C
IN
and C
OUT
could each
represent numerous physical capacitors. Dedicate one solid
layer, usually a middle layer of the PC board, for a ground
plane and make all critical component ground connections
with vias to this layer. Dedicate another solid layer as a
power plane and break this plane into smaller islands of
common voltage levels. Keep the metal runs from the
PHASE terminals to the output inductor short. The power
plane should support the input power and output power
nodes. Use copper filled polygons on the top and bottom
circuit layers for the phase nodes. Use the remaining printed
circuit layers for small signal wiring. The wiring traces from
the GATE pins to the MOSFET gates should be kept short
and wide enough to easily handle the 1A of drive current.
In order to dissipate heat generated by the internal V
TT
LDO, the ground pad, pin 29, should be connected to the
internal ground plane through at least four vias. This allows
the heat to move away from the IC and also ties the pad to
the ground plane through a low impedance path.
The switching components should be placed close to the
ISL6548 first. Minimize the length of the connections
between the input capacitors, C
IN
, and the power switches
by placing them nearby. Position both the ceramic and bulk
input capacitors as close to the upper MOSFET drain as
possible. Position the output inductor and output capacitors
between the upper and lower MOSFETs and the load.
The critical small signal components include any bypass
capacitors, feedback components, and compensation
components. Place the PWM converter compensation
components close to the FB and COMP pins. The feedback
resistors should be located as close as possible to the FB
pin with vias tied straight to the ground plane as required.
Feedback Compensation - PWM Buck Converter
Figure 3 highlights the voltage-mode control loop for a
synchronous-rectified buck converter. The output voltage
(V
OUT
) is regulated to the Reference voltage level. The error
amplifier output (V
E/A
) is compared with the oscillator (OSC)
triangular wave to provide a pulse-width modulated (PWM)
wave with an amplitude of V
IN
at the PHASE node. The
PWM wave is smoothed by the output filter (L
O
and C
O
).
The modulator transfer function is the small-signal transfer
function of V
OUT
/V
E/A
. This function is dominated by a DC
Gain and the output filter (L
O
and C
O
), with a double pole
break frequency at F
LC
and a zero at F
ESR
. The DC Gain of
the modulator is simply the input voltage (V
IN
) divided by the
peak-to-peak oscillator voltage
V
OSC
.
V
DDQ
5VSBY
ISLAND ON POWER PLANE LAYER
ISLAND ON CIRCUIT AND/OR POWER PLANE LAYER
L
1
C
OUT1
C
IN
5VDUAL
KEY
COMP
ISL6548
UGATE
R
4
R
2
C
BP
FB
DRIVE3
5VSBY
FIGURE 2. PRINTED CIRCUIT BOARD POWER PLANES
AND ISLANDS
R
1
V
GMCH
FB3
C
2
VIA CONNECTION TO GROUND PLANE
C
OUT4
L
L
Q
1
R
5
R
6
PHASE
R
3
C
3
C
1
Q
2
12V
ATX
C
BP
GNDP
P12V
Q
4
LGATE
VDDQ(2)
VTT(2)
C
OUT2
L
V
DDQ
V
TT
GND PAD
DRIVE2_U
V
TT_GMCH/CPU
FB2
C
OUT4
L
R
7
R
8
Q
5
DRIVE4
FB4
C
OUT3
Q
3
REFADJ4
Q
6
DRIVE2_L
ISL6548
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