參數(shù)資料
型號(hào): ISL6556ACB-T
廠商: INTERSIL CORP
元件分類: 穩(wěn)壓器
英文描述: Optimized Multi-Phase PWM Controller with 6-Bit DAC for VR10.X Application
中文描述: SWITCHING CONTROLLER, 1500 kHz SWITCHING FREQ-MAX, PDSO28
封裝: PLASTIC, MS-013AE, SOIC-28
文件頁數(shù): 14/24頁
文件大?。?/td> 702K
代理商: ISL6556ACB-T
14
Load-Line Regulation
Some microprocessor manufacturers require a precisely-
controlled output resistance. This dependence of output
voltage on load current is often termed “droop” or “l(fā)oad line”
regulation. By adding a well controlled output impedance,
the output voltage can be level in the direction that works to
control the voltage spike coincident with fast load current
demand changes.
The magnitude of the spike is dictated by the ESR and ESL
of the output capacitors selected. By positioning the no-load
voltage level near the upper specification limit, a larger
negative spike can be sustained without crossing the lower
limit. By adding a well controlled output impedance, the
output voltage under load can effectively be level shifted
down so that a larger positive spike can be sustained without
crossing the upper specification limit.
As shown in Figure 5, a current proportional to the average
current in all active channels, I
AVG
, flows from FB through a
load-line regulation resistor, R
FB
. The resulting voltage drop
across R
FB
is proportional to the output current, effectively
creating an output voltage droop with a steady-state value
defined as:
In most cases, each channel uses the same R
ISEN
value to
sense current. A more complete expression for V
DROOP
is
derived by combining Equations 4 and 5.
Output-Voltage Offset Programming
The ISL6556A allows the designer to accurately adjust the
offset voltage. When a resistor, R
OFS
, is connected between
OFS and VCC, the voltage across it is regulated to 2.0V.
This causes a proportional current (I
OFS
) to flow into OFS. If
R
OFS
is connected to ground, the voltage across it is
regulated to 0.5V, and I
OFS
flows out of OFS. A resistor
between DAC and REF, R
REF
, is selected so that the
product (I
OFS
x R
REF
) is equal to the desired offset voltage.
These functions are shown in Figures 6 and 7.
As evident in Figure 7, the OFSOUT pin must be connected
to the REF pin for this current injection to function in
ISL6556ACR. The current flowing through R
REF
creates an
offset at the REF pin, which is ultimately duplicated at the
output of the regulator.
Once the desired output offset voltage has been determined,
use the following formulae to set R
OFS
:
For Positive Offset (connect R
OFS
to VCC):
For Negative Offset (connect R
OFS
to GND):
×
OFFSET
V
DROOP
I
AVG
R
FB
=
(EQ. 5)
V
DROOP
I
---N
r
ISEN
)
-R
FB
=
(EQ. 6)
R
OFS
2
OFFSET
R
×
--------------------------
=
(EQ. 7)
R
OFS
0.5
-----------------------------
R
=
(EQ. 8)
DYNAMIC
VID D/A
E/A
VCC
or
GND
DAC
FB
REF
OFS
VCC
GND
+
-
+
-
0.5V
2.0V
R
OFS
R
REF
ISL6556ACB
FIGURE 6. OUTPUT VOLTAGE OFFSET PROGRAMMING
WITH ISL6556ACB (28-LEAD SOIC)
DYNAMIC
VID D/A
E/A
VCC
or
GND
DAC
FB
REF
OFS
VCC
GND
+
-
+
-
0.5V
2.0V
R
OFS
R
REF
ISL6556ACR
OFSOUT
FIGURE 7. OUTPUT VOLTAGE OFFSET PROGRAMMING
WITH ISL6556ACR (32-LEAD QFN)
ISL6556A
相關(guān)PDF資料
PDF描述
ISL6556ACBZ-T Optimized Multi-Phase PWM Controller with 6-Bit DAC for VR10.X Application
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ISL6556BCBZ Optimized Multi-Phase PWM Controller with 6-Bit DAC and Programmable Internal Temperature Compensation for VR10.X Application
ISL6556BCR-T Optimized Multi-Phase PWM Controller with 6-Bit DAC and Programmable Internal Temperature Compensation for VR10.X Application
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