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參數(shù)資料
| 型號： | ISL6565BCVZ |
| 廠商： | INTERSIL CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | Multi-Phase PWM Controller with Precision rDS(ON) or DCR Current Sensing for VR10.X Application |
| 中文描述： | SWITCHING CONTROLLER, 1500 kHz SWITCHING FREQ-MAX, PDSO28 |
| 封裝： | ROHS COMPLIANT, PLASTIC, MO-153-AE, TSSOP-28 |
| 文件頁數(shù)： | 16/28頁 |
| 文件大?。?/td> | 722K |
| 代理商： | ISL6565BCVZ |
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16
The ISL6565A, ISL6565B checks the VID inputs six times
every switching cycle. If the VID code is found to have
changed, the controller waits half of a complete cycle before
executing a 12.5mV change. If during the half-cycle wait
period, the difference between the DAC level and the new
VID code changes sign, no change is made. If the VID code
is more than 1 bit higher or lower than the DAC (not
recommended), the controller will execute 12.5mV changes
six times per cycle until VID and DAC are equal. It is
important to carefully control the rate of VID stepping in 1-bit
increments.
In order to ensure the smooth transition of output voltage
during VID change, a VID step change smoothing network is
required for an ISL6565A, ISL6565B based voltage
regulator. This network is composed of a 1k
internal
resistor between the output of DAC and the capacitor C
REF
,
between the REF pin and ground. The selection of C
REF
is
based on the time duration for 1 bit VID change and the
allowable delay time.
Assuming the microprocessor controls the VID change at 1
bit every T
VID
, the relationship between C
REF
and T
VID
is
given by Equation 15.
As an example, for a VID step change rate of 5
μ
s per bit, the
value of C
REF
is 22nF based on Equation 15.
Temperature Compensation
MOSFET r
DS(ON)
and inductor DCR are both susceptible to
changes in value due to temperature. Since output voltage
positioning is derived from the channel current sensed
across these two elements, any variation in resistance
results in a corresponding error in the output voltage.
The temperature coefficient,
α
, of the r
DS(ON)
or DCR is the
parameter that determines how much the resistance varies
with temperature. As temperature increases above ambient,
the average sensed current, I
AVG
, changes in proportion to
the temperature coefficient and temperature rise as shown in
Equation 16.
With this resulting error, I
AVG
can now be described as the
sum of two parts, the average sensed current at ambient
temperature and the resulting error current, I
ERR
, due to the
temperature rise.
In order to compensate for this error current, the ISL6565A,
ISL6565B includes a temperature compensation circuit that
injects a current, I
TCOMP
, into the FB pin. This current is
created by pushing the average sense current through a
selectable external resistor, R
TCOMP
.
As shown in Figure 10, the voltage drop developed across
R
TCOMP
is then sensed and multiplied by a known gain,
K
TC
, which is determined by the internal IC temperature.
This gain creates the temperature compensation current,
I
TCOMP
, that is injected into the FB pin.
Select R
TCOMP
such that I
TCOMP
equals I
ERR
over the
entire range of operating temperature. The resulting droop
current accurately represents the load current; achieving a
linear, temperature-independant load line.
Initialization
Prior to initialization, proper conditions must exist on the
enable inputs and VCC. When the conditions are met, the
controller begins soft-start. Once the output voltage is within
the proper window of operation, the controller asserts
PGOOD.
Enable and Disable
While in shutdown mode, the PWM outputs are held in a
high-impedance state to assure the drivers remain off. The
following input conditions must be met before the ISL6565A,
ISL6565B is released from shutdown mode.
1. The bias voltage applied at VCC must reach the internal
power-on reset (POR) rising threshold. Once this
threshold is reached, proper operation of all aspects of
the ISL6565A, ISL6565B is guaranteed. Hysteresis
between the rising and falling thresholds assure that once
enabled, the ISL6565A, ISL6565B will not inadvertently
turn off unless the bias voltage drops substantially (see
Electrical Specifications
).
C
REF
0.004X T
VID
=
(EQ. 15)
I
AVG
I
AVG TAMBIENT
)
1
α
T
(
T
AMBIENT
–
)
+
[
]
=
(EQ. 16)
I
ERR T
I
AVG TAMBIENT
)
α
T
T
AMBIENT
–
(
)
=
(EQ. 17)
FB
R
FB
ISL6565A, ISL6565B
FIGURE 10. TEMPERATURE COMPENSATION CIRCUITRY
V
DROOP
+
-
K
TC
R
TCOMP
TCOMP
I
AVG
I
AVG
I
TCOMP
VDIFF
I
DROOP
I
TCOMP
K
TC
T
25
–
(
)
I
AVG
R
TCOMP
=
(EQ. 18)
ISL6565A, ISL6565B
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