參數(shù)資料
型號: ISL6567IRZ
廠商: INTERSIL CORP
元件分類: 穩(wěn)壓器
英文描述: Multipurpose Two-Phase Buck PWM Controller with Integrated MOSFET Drivers
中文描述: SWITCHING CONTROLLER, 2000 kHz SWITCHING FREQ-MAX, PQCC24
封裝: 4 X 4 MM, ROHS COMPLIANT, PLASTIC, MO-220VGGD-2, QFN-24
文件頁數(shù): 23/26頁
文件大小: 659K
代理商: ISL6567IRZ
23
output channel of the converter. Note that capacitors C
xxIN
and C
xxOUT
could each represent numerous physical
capacitors. Dedicate one solid layer, usually the one
underneath the component side of the board, for a ground
plane and make all critical component ground connections
with vias to this layer. Dedicate another solid layer as a power
plane and break this plane into smaller islands of common
voltage levels. Keep the metal runs from the PHASE terminal
to inductor L
OUT
short. The power plane should support the
input power and output power nodes. Use copper filled
polygons on the top and bottom circuit layers for the phase
nodes. Use the remaining printed circuit layers for small signal
wiring.
Size the trace interconnects commensurate with the signals
they are carrying. Use narrow (0.005” to 0.008”) and short
traces for the high-impedance, small-signal connections, such
as the feedback, compensation, soft-start, frequency set,
enable, reference track, etc. The wiring traces from the IC to
the MOSFETs’ gates and sources should be wide (0.02” to
0.05”) and short, encircling the smallest area possible.
Component Selection Guidelines
MOSFETS
The selection of MOSFETs revolves closely around the
current each MOSFET is required to conduct, the switching
characteristics, the capability of the devices to dissipate heat,
as well as the characteristics of available heat sinking. Since
the ISL6567 drives the MOSFETs with a 5V signal, the
selection of appropriate MOSFETs should be done by
comparing and evaluating their characteristics at this specific
V
GS
bias voltage. The following paragraphs addressing
MOSFET power dissipation ignore the driving losses
associated with the gate resistance.
The aggressive design of the shoot-through protection
circuits, part of the ISL6567 output drivers, is geared toward
reducing the deadtime between the conduction of the upper
and the lower MOSFET/s. The short deadtimes, coupled with
strong pull-up and pull-down output devices driving the
UGATE and LGATE pins make the ISL6567 best suited to
driving low gate resistance (R
G
), late-generation MOSFETs. If
employing MOSFETs with a nominal gate resistance in
excess of 1-2
, check for the circuit’s proper operation. A few
examples (non exclusive list) of suitable MOSFETs to be used
in ISL6567 applications include the D8 (and later) generation
from Renesas and the OptiMOS2 line from Infineon. Along
the same line, the use of gate resistors is discouraged, as
they may interfere with the circuits just mentioned.
LOWER MOSFET POWER CALCULATION
Since virtually all of the heat loss in the lower MOSFET is
conduction loss (due to current conducted through the
channel resistance, r
DS(ON)
), a quick approximation for heat
dissipated in the lower MOSFET can be found in the
following equation:
where: I
M
is the maximum continuous output current, I
L,PP
is
the peak-to-peak inductor current, and D is the duty cycle
(approximately V
OUT
/V
IN
).
An additional term can be added to the lower-MOSFET loss
equation to account for additional loss accrued during the
dead time when inductor current is flowing through the
lower-MOSFET body diode. This term is dependent on the
diode forward voltage at I
M
, V
D(ON)
; the switching
frequency, f
S
; and the length of dead times, t
d1
and t
d2
, at
the beginning and the end of the lower-MOSFET conduction
interval, respectively.
The above equation assumes the current through the lower
MOSFET is always positive; if so, the total power dissipated
in each lower MOSFET is approximated by the summation of
P
LMOS1
and P
LMOS2
.
UPPER MOSFET POWER CALCULATION
In addition to r
DS(ON)
losses, a large portion of the upper-
MOSFET losses are switching losses, due to currents
conducted through the device while the input voltage is
present as V
DS
. Upper MOSFET losses can be divided into
separate components, separating the upper-MOSFET
switching losses, the lower-MOSFET body diode reverse
recovery charge loss, and the upper MOSFET r
DS(ON)
conduction loss.
In most typical circuits, when the upper MOSFET turns off, it
continues to conduct a decreasing fraction of the output
inductor current as the voltage at the phase node falls below
ground. Once the lower MOSFET begins conducting (via its
body diode or enhancement channel), the current in the
upper MOSFET decreases to zero. In the following equation,
the required time for this commutation is t
1
and the
associated power loss is P
UMOS,1
.
Similarly, the upper MOSFET begins conducting as soon as
it begins turning on. Assuming the inductor current is in the
positive domain, the upper MOSFET sees approximately the
input voltage applied across its drain and source terminals,
while it turns on and starts conducting the inductor current.
P
LMOS1
r
DS ON
)
I
-------------
2
1
D
(
)
I
,
--------------------–
2
1
(
12
)
+
=
P
LMOS2
V
D ON
)
f
S
I
-------------
I
--------
+
t
d1
I
-------------
I
--------
t
d2
+
=
P
UMOS 1
,
V
IN
I
-------------
I
,
-------------
+
t
1
2
----
f
S
ISL6567
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