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參數(shù)資料
| 型號(hào)： | ISL6592 |
| 廠商： | INTERSIL CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | Dual Low-Noise Wide-Bandwidth Precision Amplifier 8-TSSOP -40 to 85 |
| 中文描述： | SWITCHING CONTROLLER, 1500 kHz SWITCHING FREQ-MAX, PQFP48 |
| 封裝： | 7 X 7 MM, PLASTIC, LQFP-48 |
| 文件頁數(shù)： | 8/21頁 |
| 文件大小： | 378K |
| 代理商： | ISL6592 |
8
FN9163.1
August 5, 2005
Pin Description
PIN #
NAME
I/O
TYPE
DESCRIPTION
1
GND
I
GND
Ground
2
VID4
I
1.2V CMOS
Bit 4 of processor voltage identification word (MSB)
3
VID3
I
1.2V CMOS
Bit 3 of processor voltage identification word
4
VID2
I
1.2V CMOS
Bit 2 of processor voltage identification word
5
VID1
I
1.2V CMOS
Bit 1 of processor voltage identification word
6
VID0
I
1.2V CMOS
Bit 0 of processor voltage identification word (LSB of 5-bit VID word)
7
VID5
I
1.2V CMOS
Bit 5 of processor voltage identification word (LSB of 6-bit VID word)
8
OUTEN
I
1.2V CMOS
Processor output enable input signal used to command the regulator
output.
“1”
Regulator output voltage active
“0”
Regulator output voltage three-stated
9
VCC_PWRGD
O
Open
Drain
Digital Controller power good control output signal to indicate the
regulator output voltage is within the specified range.
“1”
μ
P VCC > 90% of target regulation voltage
“0”
μ
P VCC < 90% of target regulation voltage
10
OUT12
O
3.3V CMOS
Configurable PWM, NDRIVE, ATRH or ATRL output (see Table 3)
11
OUT11
O
3.3V CMOS
Configurable PWM, NDRIVE, ATRH or ATRL output (see Table 3)
12
VDD
I
VDD
3.3V power supply connection
13
OUT10
O
3.3V CMOS
Configurable PWM, NDRIVE, ATRH or ATRL output (see Table 3)
14
OUT9
O
3.3V CMOS
Configurable PWM, NDRIVE, ATRH or ATRL output (see Table 3)
15
OUT8
O
3.3V CMOS
Configurable PWM, NDRIVE, ATRH or ATRL output (see Table 3)
16
OUT7
O
3.3V CMOS
Configurable PWM, NDRIVE, ATRH or ATRL output (see Table 3)
17
OUT6
O
3.3V CMOS
Configurable PWM, NDRIVE, ATRH or ATRL output (see Table 3)
18
OUT5
O
3.3V CMOS
Configurable PWM, NDRIVE, ATRH or ATRL output (see Table 3)
19
OUT4
O
3.3V CMOS
Configurable PWM, NDRIVE, ATRH or ATRL output (see Table 3)
20
OUT3
O
3.3V CMOS
Configurable PWM, NDRIVE, ATRH or ATRL output (see Table 3)
21
OUT2
O
3.3V CMOS
Configurable PWM, NDRIVE, ATRH or ATRL output (see Table 3)
22
OUT1
O
3.3V CMOS
Configurable PWM, NDRIVE, ATRH or ATRL output (see Table 3)
23
V12_SEN
I
Analog
1/10 V12 voltage divider input. Used to guarantee valid input power
supply before starting up (undervoltage lockout)
24
VDD
I
VDD
3.3V power supply connection
25
GND
I
GND
Ground
26
VSENN
I
Analog
Negative regulator output voltage sense input.
27
VSENP
I
Analog
Positive regulator output voltage sense input.
28
VBG_EXT
I
Analog
optional external bandgap voltage (not used)
29
TEMP_SEN
O
Analog
External thermistor temperature sense. Connected to ground
through a negative TC thermistor, with series and shunt resistance
added to achieve desired range. TEMP_SEN is held at 150mV,
current through thermistor is measured by ADC. Effective ADC
range is 0 - 275
μ
A in 4.3
μ
A steps. User should avoid using the 4
codes at the extremes in order to avoid clipping the ADC. ADC code
is translated to temperature using an internal 4 segment piecewise
linear lookup table.
ISL6592
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