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參數(shù)資料
| 型號(hào)： | ISL76120ARTZ-T |
| 廠商： | Intersil |
| 文件頁數(shù)： | 5/13頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MULTIPLEXER DUAL SPDT 10TDFN |
| 標(biāo)準(zhǔn)包裝： | 6,000 |
| 功能： | 多路復(fù)用器 |
| 電路： | 2 x SPDT |
| 導(dǎo)通狀態(tài)電阻： | 10 歐姆 |
| 電壓電源： | 單電源 |
| 電壓 - 電源，單路/雙路(±)： | 2.7 V ~ 5.5 V |
| 電流 - 電源： | 20nA |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 10-VFDFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 10-TDFN/MLP（3x3） |
| 包裝： | 帶卷 (TR) |
13
FN6711.2
December 23, 2013
Intersil Automotive Qualified products are manufactured, assembled and tested utilizing TS16949 quality systems as noted
in the quality certifications found at www.intersil.com/en/support/qualandreliability.html
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time
without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be
accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
For additional products, see www.intersil.com/en/products.html
Thin Dual Flat No-Lead Plastic Package (TDFN)
//
NX (b)
SECTION "C-C"
FOR ODD TERMINAL/SIDE
e
CC
5
C
L
TERMINAL TIP
(A1)
BOTTOM VIEW
A
6
AREA
INDEX
C
0.10
0.08
SIDE VIEW
0.10
2X
E
A
B
C
0.10
D
TOP VIEW
CB
2X
6
8
AREA
INDEX
NX L
E2
E2/2
REF.
e
N
(Nd-1)Xe
(DATUM A)
(DATUM B)
5
0.10
8
7
D2
B
A
C
N-1
12
PLANE
SEATING
C
A
A3
NX b
D2/2
NX k
L1
9 L
M
L10.3x3A
10 LEAD THIN DUAL FLAT NO-LEAD PLASTIC PACKAGE
SYMBOL
MILLIMETERS
NOTES
MIN
NOMINAL
MAX
A
0.70
0.75
0.80
-
A1
-
0.05
-
A3
0.20 REF
-
b
0.20
0.25
0.30
5, 8
D
2.95
3.0
3.05
-
D2
2.25
2.30
2.35
7, 8
E
2.95
3.0
3.05
-
E2
1.45
1.50
1.55
7, 8
e
0.50 BSC
-
k
0.25
-
L
0.25
0.30
0.35
8
N
10
2
Nd
5
3
Rev. 3 3/06
NOTES:
1. Dimensioning and tolerancing conform to ASME Y14.5-1994.
2. N is the number of terminals.
3. Nd refers to the number of terminals on D.
4. All dimensions are in millimeters. Angles are in degrees.
5. Dimension b applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
7. Dimensions D2 and E2 are for the exposed pads which provide
improved electrical and thermal performance.
8. Nominal dimensions are provided to assist with PCB Land
Pattern Design efforts, see Intersil Technical Brief TB389.
9. Compliant to JEDEC MO-229-WEED-3 except for D2
dimensions.
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