tSHDN (Notes 10, 13) Full 60 160 600 ns Receiver Enable from" />
參數(shù)資料
型號: ISL83082EIB-T
廠商: Intersil
文件頁數(shù): 18/19頁
文件大?。?/td> 0K
描述: IC TXRX RS485/422 5V ESD 8-SOIC
標準包裝: 2,500
類型: 收發(fā)器
驅(qū)動器/接收器數(shù): 1/1
規(guī)程: RS422,RS485
電源電壓: 4.5 V ~ 5.5 V
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SOICN
包裝: 帶卷 (TR)
8
FN6085.9
April 22, 2008
Time to Shutdown
tSHDN
(Notes 10, 13)
Full
60
160
600
ns
Receiver Enable from Shutdown to
Output High
tZH(SHDN) RL = 1kΩ, CL = 15pF, SW = GND (Figure 6),
(Notes 10, 12, 13)
Full
-
150
2000
ns
Receiver Enable from Shutdown to
Output Low
tZL(SHDN) RL = 1kΩ, CL = 15pF, SW = VCC (Figure 6),
(Notes 10, 12, 13)
Full
-
150
2000
ns
RECEIVER SWITCHING CHARACTERISTICS (10Mbps Versions; ISL83086E, ISL83088E)
Maximum Data Rate
fMAX
(Figure 5) (Note 15)
Full
10
15
-
Mbps
Receiver Input to Output Delay
tPLH, tPHL (Figure 5)
Full
-
70
125
ns
Receiver Skew | tPLH - tPHL |tSKD
(Figure 5)
Full
-
0
10
ns
Receiver Enable to Output Low
tZL
RL = 1kΩ, CL = 15pF, SW = VCC (Figure 6)
(Note 9)
Full
-
10
30
ns
Receiver Enable to Output High
tZH
RL = 1kΩ, CL = 15pF, SW = GND (Figure 6)
(Note 9)
Full
-
10
30
ns
Receiver Disable from Output Low
tLZ
RL = 1kΩ, CL = 15pF, SW = VCC (Figure 6)
Full
-
10
30
ns
Receiver Disable from Output High
tHZ
RL = 1kΩ, CL = 15pF, SW = GND (Figure 6)
Full
-
10
30
ns
Time to Shutdown
tSHDN
(Note 10)
Full
60
160
600
ns
Receiver Enable from Shutdown to
Output High
tZH(SHDN) RL = 1kΩ, CL = 15pF, SW = GND (Figure 6)
(Notes 10, 12)
Full
-
150
2000
ns
Receiver Enable from Shutdown to
Output Low
tZL(SHDN) RL = 1kΩ, CL = 15pF, SW = VCC (Figure 6)
(Notes 10, 12)
Full
-
150
2000
ns
NOTES:
4. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
5. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless
otherwise specified.
6. Supply current specification is valid for loaded drivers when DE = 0V.
7. Applies to peak current. See “Typical Performance Curves” beginning on page 12 for more information.
8. Keep RE = 0 to prevent the device from entering SHDN.
9. The RE signal high time must be short enough (typically <100ns) to prevent the device from entering SHDN.
10. Transceivers are put into shutdown by bringing RE high and DE low. If the inputs are in this state for less than 60ns, the parts are guaranteed
not to enter shutdown. If the inputs are in this state for at least 600ns, the parts are guaranteed to have entered shutdown. See “Low Power
11. Keep RE = VCC, and set the DE signal low time >600ns to ensure that the device enters SHDN.
12. Set the RE signal high time >600ns to ensure that the device enters SHDN.
13. Does not apply to the ISL83084E.
14. Tested according to TIA/EIA-485-A, section 4.2.6 (±75V for 15s at a 1% duty cycle).
15. Limits established by characterization and are not production tested.
Electrical Specifications
Test Conditions: VCC = 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at VCC = 5V, TA = +25°C
(Note 5). (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
TEMP
(°C)
MIN
(Note 4)
TYP
MAX
(Note 4)
UNITS
ISL83080E, ISL83082E, ISL83083E, ISL83084E, ISL83085E, ISL83086E, ISL83088E
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