參數(shù)資料
型號: ISL84515
廠商: Intersil Corporation
元件分類: DRAM
英文描述: 512 x 36 synchronous FIFO memory 120-HLQFP 0 to 70
中文描述: 低電壓,單電源,聚苯乙烯,模擬開關(guān)
文件頁數(shù): 8/11頁
文件大?。?/td> 266K
代理商: ISL84515
8
Leakage Considerations
Reverse ESD protection diodes are internally connected
between each analog-signal pin and both V+ and GND.
One of these diodes conducts if any analog signal exceeds
V+ or GND.
Virtually all the analog leakage current comes from the ESD
diodes to V+ or GND. Although the ESD diodes on a given
signal pin are identical and therefore fairly well balanced,
they are reverse biased differently. Each is biased by either
V+ or GND and the analog signal. This means their leakages
will vary as the signal varies. The difference in the two diode
leakages to the V+ and GND pins constitutes the analog-
signal-path leakage current. All analog leakage current flows
between each pin and one of the supply terminals, not to the
other switch terminal. This is why both sides of a given
switch can show leakage currents of the same or opposite
polarity. There is no connection between the analog-signal
paths and V+ or GND.
Typical Performance Curves
T
A
= 25
o
C, Unless Otherwise Specified
FIGURE 7. ON RESISTANCE vs SUPPLY VOLTAGE
FIGURE 8. ON RESISTANCE vs SWITCH VOLTAGE
FIGURE 9. CHARGE INJECTION vs SWITCH VOLTAGE
FIGURE 10. DIGITAL SWITCHING POINT vs SUPPLY VOLTAGE
R
O
)
V+ (V)
25
15
5
3
4
5
6
7
8
9
10
11
12
13
25
o
C
-40
o
C
85
o
C
10
20
I
COM
= 1mA
V
COM
= (V+) - 1V
R
O
)
V
COM
(V)
0
4
6
8
10
12
2
4
6
8
10
12
14
25
o
C
-40
o
C
85
o
C
V+ = 12V
10
19
15
20
25
V+ = 3.3V
I
COM
= 1mA
25
o
C
-40
o
C
85
o
C
7
9
11
13
15
17
V+ = 5V
25
o
C
-40
o
C
85
o
C
Q
V
COM
(V)
0
1
2
3
4
5
0
10
20
30
40
50
V+ = 3.3V
V+ = 5V
V+ (V)
2
5
3.0
2.5
2.0
1.5
1.0
0.5
3
4
6
7
8
9
10
11
12
13
V
I
I
-40
o
C
-40
o
C
85
o
C
V
INH
V
INL
25
o
C
85
o
C
25
o
C
ISL84514, ISL84515
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