參數(shù)資料
型號: ISL84762IU-T
廠商: Intersil
文件頁數(shù): 11/12頁
文件大小: 0K
描述: IC SWITCH DUAL SPDT 10MSOP
標準包裝: 2,500
功能: 開關(guān)
電路: 2 x SPDT
導(dǎo)通狀態(tài)電阻: 600 毫歐
電壓電源: 單電源
電壓 - 電源,單路/雙路(±): 1.65 V ~ 3.6 V
電流 - 電源: 40nA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 10-TFSOP,10-MSOP(0.118",3.00mm 寬)
供應(yīng)商設(shè)備封裝: 10-MSOP
包裝: 帶卷 (TR)
8
FN6105.1
September 15, 2008
Logic-Level Thresholds
This switch family is 1.8V CMOS compatible (0.5V and 1.4V)
over a supply range of 2.0V to 3.6V (see Figure 16). At 3.6V
the VIH level is about 1.27V. This is still below the 1.8V
CMOS guaranteed high output minimum level of 1.4V, but
noise margin is reduced.
The digital input stages draw supply current whenever the
digital input voltage is not at one of the supply rails. Driving
the digital input signals from GND to V+ with a fast transition
time minimizes power dissipation.
High-Frequency Performance
In 50
Ω systems, the signal response is reasonably flat even
past 30MHz with a -3dB bandwidth of 120MHz (see
Figure 17). The frequency response is very consistent over a
wide V+ range, and for varying analog signal levels.
An OFF switch acts like a capacitor and passes higher
frequencies with less attenuation, resulting in signal
feedthrough from a switch’s input to its output. Off-Isolation
is the resistance to this feedthrough, while crosstalk
indicates the amount of feedthrough from one switch to
another. Figure 18 details the high off-Isolation and crosstalk
rejection provided by this part. At 100kHz, off-Isolation is
about 68dB in 50
Ω systems, decreasing approximately 20dB
per decade as frequency increases. Higher load
impedances decrease off-Isolation and crosstalk rejection
due to the voltage divider action of the switch OFF
impedance and the load impedance.
Leakage Considerations
Reverse ESD protection diodes are internally connected
between each analog-signal pin and both V+ and GND. One of
these diodes conducts if any analog signal exceeds V+ or
GND.
Virtually all the analog leakage current comes from the ESD
diodes to V+ or GND. Although the ESD diodes on a given
signal pin are identical and therefore fairly well balanced,
they are reverse biased differently. Each is biased by either
V+ or GND and the analog signal. This means their leakages
will vary as the signal varies. The difference in the two diode
leakages to the V+ and GND pins constitutes the analog-
signal-path leakage current. All analog leakage current flows
between each pin and one of the supply terminals, not to the
other switch terminal. This is why both sides of a given
switch can show leakage currents of the same or opposite
polarity. There is no connection between the analog signal
Typical Performance Curves
TA = +25°C, Unless Otherwise Specified.
FIGURE 10. ON-RESISTANCE vs SUPPLY VOLTAGE vs
SWITCH VOLTAGE
FIGURE 11. ON-RESISTANCE vs SWITCH VOLTAGE
r ON
(
Ω
)
VCOM (V)
01
23
4
ICOM = 100mA
0.1
0.2
0.3
0.4
0.5
0.6
0.7
V+ = 2.7V
V+ = 1.8V
V+ = 3.6V
V+ = 3V
r ON
(
Ω
)
VCOM (V)
0
0.5
1.0
1.5
2.0
2.5
3.0
0.30
0.32
0.34
0.36
0.38
0.40
0.42
0.44
+25°C
+85°C
-40°C
V+ = 2.7V
ICOM = 100mA
ISL84762
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