參數(shù)資料
型號: ISL8483EIP
廠商: INTERSIL CORP
元件分類: 通用總線功能
英文描述: Octal D-Type Transparent Latches With 3-State Outputs 20-SOIC -40 to 85
中文描述: LINE TRANSCEIVER, PDIP8
封裝: PLASTIC, MS-001BA, DIP-8
文件頁數(shù): 8/14頁
文件大?。?/td> 416K
代理商: ISL8483EIP
8
Application Information
RS-485 and RS-422 are differential (balanced) data
transmission standards for use in long haul or noisy
environments. RS-422 is a subset of RS-485, so RS-485
transceivers are also RS-422 compliant. RS-422 is a point-
to-multipoint (multidrop) standard, which allows only one
driver and up to 10 (assuming one unit load devices)
receivers on each bus. RS-485 is a true multipoint standard,
which allows up to 32 one unit load devices (any
combination of drivers and receivers) on each bus. To allow
for multipoint operation, the RS-485 spec requires that
drivers must handle bus contention without sustaining any
damage.
Another important advantage of RS-485 is the extended
common mode range (CMR), which specifies that the driver
outputs and receiver inputs withstand signals that range
from +12V to -7V. RS-422 and RS-485 are intended for runs
as long as 4000’, so the wide CMR is necessary to handle
ground potential differences, as well as voltages induced in
the cable by external fields.
Receiver Features
These devices utilize a differential input receiver for maximum
noise immunity and common mode rejection. Input sensitivity
is
±
200mV, as required by the RS422 and RS-485
specifications.
Receiver input impedance surpasses the RS-422 spec of
4k
, and meets the RS-485 “Unit Load” requirement of
12k
minimum.
Receiver inputs function with common mode voltages as
great as
±
7V outside the power supplies (i.e., +12V and
-7V), making them ideal for long networks where induced
voltages are a realistic concern.
All the receivers include a “fail-safe if open” function that
guarantees a high level receiver output if the receiver inputs
are unconnected (floating).
FIGURE 4A. TEST CIRCUIT
FIGURE 4B. MEASUREMENT POINTS
FIGURE 4. RECEIVER PROPAGATION DELAY
FIGURE 5A. TEST CIRCUIT
FIGURE 5B. MEASUREMENT POINTS
FIGURE 5. RECEIVER ENABLE AND DISABLE TIMES
Test Circuits and Waveforms
(Continued)
SIGNAL
GENERATOR
R
RO
RE
A
B
+1.5V
15pF
RO
3V
0V
t
PLH
1.5V
1.5V
V
CC
0V
50%
50%
t
PHL
A
1k
V
CC
GND
SW
(SHDN) FOR ISL8483E ONLY
PARAMETER
t
HZ
t
LZ
t
ZH
(Note 6)
t
ZL
(Note 6)
t
ZH(SHDN)
(Note 9)
t
ZL(SHDN)
(Note 9)
DE
0
0
0
0
0
0
A
SW
GND
V
CC
GND
V
CC
GND
V
CC
+1.5V
-1.5V
+1.5V
-1.5V
+1.5V
-1.5V
SIGNAL
GENERATOR
R
RO
RE
A
B
15pF
RO
3V
0V
1.5V
1.5V
V
OH
0V
1.5V
V
OH
- 0.5V
t
HZ
RO
V
CC
V
OL
1.5V
V
OL
+ 0.5V
t
LZ
RE
OUTPUT HIGH
OUTPUT LOW
t
ZL
, t
ZL(SHDN)
NOTE 7
t
ZH
, t
ZH(SHDN)
NOTE 7
NOTE 7
ISL8483E, ISL8485E
相關(guān)PDF資料
PDF描述
ISL8485ECB Octal D-Type Transparent Latches With 3-State Outputs 20-TSSOP -40 to 85
ISL8485ECP Octal D-Type Transparent Latches With 3-State Outputs 20-TSSOP -40 to 85
ISL8485EIP Octal D-Type Transparent Latches With 3-State Outputs 20-TSSOP -40 to 85
ISL8483EIB ESD Protected to 【15kV, 5V, Low Power, High Speed or Slew Rate Limited, RS-485/RS-422 Transceivers
ISL8483EIB-T ESD Protected to 【15kV, 5V, Low Power, High Speed or Slew Rate Limited, RS-485/RS-422 Transceivers
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ISL8483EIPZ 功能描述:IC TXRX RS485/422 5V ESD 8-PDIP RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動器,接收器,收發(fā)器 系列:- 標準包裝:250 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-TSSOP(0.173",4.40mm 寬) 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:帶卷 (TR)
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ISL8483IBZ 功能描述:IC TXRX RS-485/422 5V 8-SOIC RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動器,接收器,收發(fā)器 系列:- 標準包裝:250 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-TSSOP(0.173",4.40mm 寬) 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:帶卷 (TR)
ISL8483IBZ-T 功能描述:IC TXRX RS-485/422 5V 8-SOIC RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動器,接收器,收發(fā)器 系列:- 標準包裝:250 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-TSSOP(0.173",4.40mm 寬) 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:帶卷 (TR)