參數(shù)資料
型號: ISL8484IU-T
廠商: Intersil
文件頁數(shù): 11/13頁
文件大?。?/td> 0K
描述: IC SWITCH DUAL SPDT 10MSOP
標(biāo)準(zhǔn)包裝: 2,500
功能: 開關(guān)
電路: 2 x SPDT
導(dǎo)通狀態(tài)電阻: 500 毫歐
電壓電源: 單電源
電壓 - 電源,單路/雙路(±): 1.65 V ~ 4.5 V
電流 - 電源: 100nA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 10-TFSOP,10-MSOP(0.118",3.00mm 寬)
供應(yīng)商設(shè)備封裝: 10-MSOP
包裝: 帶卷 (TR)
7
FN6128.5
May 12, 2008
Detailed Description
The ISL8484 is a bidirectional, dual single pole/double throw
(SPDT) analog switch that offers precise switching capability
from a single 1.65V to 4.5V supply with low on-resistance
(0.29
Ω) and high speed operation (tON =40ns, tOFF = 20ns).
The device is especially well suited for portable
battery-powered equipment due to its low operating supply
voltage (1.65V), low power consumption (4.5W max), low
leakage currents (195nA max), and the tiny DFN and MSOP
packages. The ultra low on-resistance and rON flatness
provide very low insertion loss and distortion to applications
that require signal reproduction.
External V+ Series Resistor
For improved ESD and latch-up immunity Intersil
recommends adding a 100
Ω resistor in series with the V+
power supply pin of the ISL8484 IC (see Figure 8).
During an overvoltage transient event, such as occurs during
system level IEC 61000 ESD testing, substrate currents can
be generated in the IC that can trigger parasitic SCR
structures to turn ON, creating a low impedance path from the
V+ power supply to ground. This will result in a significant
amount of current flow in the IC which can potentially create a
latch-up state or permanently damage the IC. The external V+
resistor limits the current during this over-stress situation and
has been found to prevent latch-up or destructive damage for
many overvoltage transient events.
Under normal operation the sub-microamp IDD current of the
IC produces an insignificant voltage drop across the 100
Ω
series resistor resulting in no impact to switch operation or
performance.
FIGURE 4. OFF-ISOLATION TEST CIRCUIT
FIGURE 5. rON TEST CIRCUIT
FIGURE 6. CROSSTALK TEST CIRCUIT
FIGURE 7. CAPACITANCE TEST CIRCUIT
Test Circuits and Waveforms (Continued)
ANALYZER
RL
SIGNAL
GENERATOR
V+
C
0V OR V+
NO OR NC
COM
IN
GND
Signal direction through switch is reversed, worst case values
are recorded. Repeat test for all switches.
V+
C
0V OR V+
NO OR NC
COM
IN
GND
VNX
V1
RON = V1/100mA
100mA
Repeat test for all switches.
0V OR V+
ANALYZER
V+
C
NO OR NC
SIGNAL
GENERATOR
RL
GND
IN1
COM
50
Ω
N C
COM
NC or NO
Signal direction through switch is reversed, worst case values
are recorded. Repeat test for all switches.
V+
C
GND
NO OR NC
COM
IN
IMPEDANCE
ANALYZER
0V OR V+
Repeat test for all switches.
ISL8484
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