參數(shù)資料
型號(hào): ISL8499IVZ
廠商: INTERSIL CORP
元件分類(lèi): 運(yùn)動(dòng)控制電子
英文描述: Ultra Low ON-Resistance, +1.65V to +4.5V, Single Supply, Quad SPDT (Dual DPDT) Analog Switch
中文描述: QUAD 1-CHANNEL, SGL POLE DOUBLE THROW SWITCH, PDSO16
封裝: ROHS COMPLIANT, PLASTIC, MO-153AB, TSSOP-16
文件頁(yè)數(shù): 7/13頁(yè)
文件大?。?/td> 464K
代理商: ISL8499IVZ
7
FN6111.0
January 27, 2005
Detailed Description
The ISL8499 is a bidirectional, quad single pole/double
throw (SPDT) analog switch that offers precise switching
capability from a single 1.65V to 4.5V supply with low on-
resistance (0.24
) and high speed operation (t
ON
= 15ns,
t
OFF
= 13ns). The device is especially well suited for
portable battery powered equipment due to its low operating
supply voltage (1.65V), low power consumption (2.7
μ
W
max), low leakage currents (150nA max), and the tiny QFN
and TSSOP packages. The ultra low on-resistance and Ron
flatness provide very low insertion loss and distortion to
applications that require signal reproduction.
Supply Sequencing and Overvoltage Protection
With any CMOS device, proper power supply sequencing is
required to protect the device from excessive input currents
which might permanently damage the IC. All I/O pins contain
ESD protection diodes from the pin to V+ and to GND (see
Figure 8). To prevent forward biasing these diodes, V+ must
be applied before any input signals, and the input signal
voltages must remain between V+ and GND. If these
conditions cannot be guaranteed, then one of the following
two protection methods should be employed.
Logic inputs can easily be protected by adding a 1k
resistor in series with the input (see Figure 8). The resistor
limits the input current below the threshold that produces
permanent damage, and the sub-microamp input current
produces an insignificant voltage drop during normal
operation.
This method is not acceptable for the signal path inputs.
Adding a series resistor to the switch input defeats the
purpose of using a low R
ON
switch, so two small signal
diodes can be added in series with the supply pins to provide
overvoltage protection for all pins (see Figure 8). These
additional diodes limit the analog signal from 1V below V+ to
FIGURE 4. OFF ISOLATION TEST CIRCUIT
FIGURE 5. R
ON
TEST CIRCUIT
FIGURE 6. CROSSTALK TEST CIRCUIT
FIGURE 7. CAPACITANCE TEST CIRCUIT
Test Circuits and Waveforms
(Continued)
ANALYZER
R
L
SIGNAL
GENERATOR
V+
C
0V or V+
NO or NC
COM
IN
GND
V+
C
0V or V+
NO or NC
COM
IN
GND
V
NX
V
1
R
ON
= V
1
/100mA
100mA
0V or V+
ANALYZER
V+
C
NO or NC
SIGNAL
GENERATOR
R
L
GND
IN
1
COM
50
N.C.
COM
NC or NO
V+
C
GND
NO or NC
COM
IN
IMPEDANCE
ANALYZER
0V or V+
ISL8499
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