參數資料
型號: ISL8563ECB
廠商: INTERSIL CORP
元件分類: 通用總線功能
英文描述: +/-15kV ESD Protected, +3V to +5.5V, 1Microamp, 250kbps, EIA/TIA-562, EIA/TIA-232 Transmitters/Receivers
中文描述: DUAL LINE TRANSCEIVER, PDSO18
封裝: PLASTIC, MS-013-AB, SOIC-18
文件頁數: 6/9頁
文件大?。?/td> 270K
代理商: ISL8563ECB
6
Capacitor Selection
The charge pumps operate with 0.1
μ
F (or greater)
capacitors for 3.0V
V
CC
5.5V. Increasing the capacitor
values (by a factor of 2) reduces ripple on the transmitter
outputs and slightly reduces power consumption. C
2
, C
3
, and
C
4
can be increased without increasing C
1
’s value, however,
do not increase C
1
without also increasing C
2
, C
3
, and C
4
to
maintain the proper ratios (C
1
to the other capacitors).
When using minimum required capacitor values, make sure
that capacitor values do not degrade excessively with
temperature. If in doubt, use capacitors with a larger nominal
value. The capacitor’s equivalent series resistance (ESR)
usually rises at low temperatures and it influences the
amount of ripple on V+ and V-.
Power Supply Decoupling
In most circumstances a 0.1
μ
F bypass capacitor is
adequate. In applications that are particularly sensitive to
power supply noise, decouple V
CC
to ground with a
capacitor of the same value as the charge-pump capacitor C
1
.
Connect the bypass capacitor as close as possible to the IC.
Operation Down to 2.7V
ISL8563E transmitter outputs meet RS-562 levels (
±
3.7V), at
the full data rate, with V
CC
as low as 2.7V. RS-562 levels
typically ensure interoperability with RS-232 devices.
Transmitter Outputs When Exiting
Powerdown
Figure 6 shows the response of two transmitter outputs
when exiting powerdown mode. As they activate, the two
transmitter outputs properly go to opposite RS-562/232
levels, with no glitching, ringing, nor undesirable transients.
Each transmitter is loaded with 3k
in parallel with 2500pF.
Note that the transmitters enable only when the magnitude
of the supplies exceed approximately 3V.
High Data Rates
The ISL8563E maintains the RS-232
±
5V minimum
transmitter output voltages even at high data rates. Figure 7
details a transmitter loopback test circuit, and Figure 8
illustrates the loopback test result at 120kbps. For this test,
all transmitters were simultaneously driving RS-232 loads in
parallel with 1000pF, at 120kbps. Figure 9 shows the
loopback results for a single transmitter driving 1000pF and
an RS-232 load at 250kbps. The static transmitters were
also loaded with an RS-232 receiver.
FIGURE 4. POWER DRAIN THROUGH POWERED DOWN
PERIPHERAL
OLD
V
CC
POWERED
DOWN
UART
GND
SHDN = GND
V
CC
Rx
Tx
V
CC
CURRENT
FLOW
V
OUT
=
V
CC
RS-562/232 CHIP
FIGURE 5. DISABLED RECEIVERS PREVENT POWER DRAIN
ISL8563E
TRANSITION
DETECTOR
R
X
T
X
R2
OUT
T1
IN
V
CC
V
CC
TO
R2
IN
T1
OUT
V
OUT
=
HI-Z
POWERED
DOWN
UART
SHDN = GND, EN = V
CC
WAKE-UP
LOGIC
TIME (20
μ
s/DIV)
T1
T2
2V/DIV
5V/DIV
V
CC
= +3.3V
C1 - C4 = 0.1
μ
F
SHDN
FIGURE 6. TRANSMITTER OUTPUTS WHEN EXITING
POWERDOWN
ISL8563E
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