參數(shù)資料
型號(hào): ISL8704AIBZ
廠商: INTERSIL CORP
元件分類: 數(shù)字信號(hào)處理外設(shè)
英文描述: Adjustable Quad Sequencer
中文描述: DSP-ADDRESS SEQUENCER, PDSO14
封裝: ROHS COMPLIANT, PLASTIC, MS-012AB, SOIC-14
文件頁數(shù): 6/12頁
文件大?。?/td> 285K
代理商: ISL8704AIBZ
6
FN6381.0
October 12, 2006
An Advanced Tutorial on Setting UV and OV Levels
This section discusses in additional detail the nuances of
setting the UV and OV levels, providing more insight into the
ISL870XA than the earlier text.
The following equation set can alternatively be used to work out
ideal values for a 3 resistor divider string of Ru, Rm and Rl.
These equations assume that V
REF
is the center point between
V
UVRvth
and V
UVFvth
(i.e. (V
UVRvth
+ V
UVFvth
)/2 = 1.17V),
Iload is the load current in the resistor string (i.e. V
IN
/(Ru + Rm
+ Rl)), V
IN
is the nominal input voltage and Vtol is the
acceptable voltage tolerance, such that the UV and OV
thresholds are centered at V
IN
± Vtol. The actual acceptable
voltage window will also be affected by the hysteresis at the UV
and OV pins. This hysteresis is amplified by the resistor string
such that the hysteresis at the top of the string is:
Vhys = V
UVhys
x V
OUT
/V
REF
This means that the V
IN
± Vtol thresholds will exhibit
hysteresis resulting in thresholds of V
IN
+ Vtol ± Vhys/2 and
V
IN
- Vtol ± Vhys/2.
There is a window between the V
IN
rising UV threshold and
the V
IN
falling OV threshold where the input level is
guaranteed not to be detected as a fault. This window exists
between the limits V
IN
± (Vtol - Vhys/2). There is an
extension of this window in each direction up to
V
IN
± (Vtol + Vhys/2), where the voltage may or may not be
detected as a fault, depending on the direction from which it
is approached. These two equations may be used to
determine the required value of Vtol for a given system. For
example, if V
IN
is 12V, Vhys = (0.1 x 12)/1.17 = 1.03V. If V
IN
must remain within 12V ± 1.5V, Vtol = 1.5 - 1.03/2 = 0.99V.
This will give a window of 12 ±0.48V where the system is
guaranteed not to be in fault and a limit of 12 ±1.5V beyond
which the system is guaranteed to be in fault.
It is wise to check both these voltages, for if the latter is made to
tight, the former will cease to exist. This point comes when Vtol
< Vhys/2 and results from the fact that the acceptable window
for the OV pin no longer aligns with the acceptable window for
the UV pin. In this case, the application will have to be changed
such that UV and OV are provided separate resistor strings. In
this case, the UV and OV thresholds can be individually
controlled by adjusting the relevant divider.
The previous example will give voltage thresholds of:
with V
IN
rising
UVr = V
IN
- Vtol + Vhys/2 = 11.5V and
OVr = V
IN
+ Vtol + Vhys/2 = 13.5V
with V
IN
falling
Ovf = V
IN
+ Vtol - Vhys/2 = 12.5V and
UVf = V
IN
- Vtol - Vhys/2 = 10.5V.
So with a single three resistor string, the resistor values can
be calculated as:
Rl = (V
REF
/Iload) (1 - Vtol/V
IN
)
Rm = 2(V
REF
x Vtol)/(V
IN
x Iload)
Ru = 1/Iload x (V
IN
- V
REF
(1+Vtol/V
IN
))
For the above example, with Vtol = 0.99V, assuming a
100μA Iload at V
IN
= 12V:
Rl = 10.7k
Ω
Rm = 1.9k
Ω
Ru = 107.3k
Ω
FIGURE 2. ISL8702A OPERATIONAL DIAGRAM
ENABLE OUTPUTS
A
B
C
D
FAULT
A
B
C
D
SEQ_EN
TIME
ISL8700A, ISL8701A, ISL8702A, ISL8703A, ISL8704A, ISL8705A
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