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參數(shù)資料
| 型號(hào)： | ISL88013IH544Z-TK |
| 廠商： | INTERSIL CORP |
| 元件分類： | 電源管理 |
| 英文描述： | 5 Ld Voltage Supervisors with Adjustable Power-On Reset, Dual Voltage Monitoring or Watchdog Timer Capability |
| 中文描述： | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO5 |
| 封裝： | ROHS COMPLIANT, PLASTIC, MO-178AA, SOT-23, SC-74, 5 PIN |
| 文件頁(yè)數(shù)： | 8/12頁(yè) |
| 文件大?。?/td> | 223K |
| 代理商： | ISL88013IH544Z-TK |
8
FN8093.1
December 14, 2006
Power On Reset (POR)
Applying at least 1V to the V
DD
pin activates a POR circuit
which asserts reset (i.e. RST goes HIGH while RST goes
LOW). The reset signals remain asserted until the voltage at
V
DD
and/or VMON rise above the minimum voltage sense
level for time period t
POR
. This ensures that the voltages
have stabilized.
These reset signals provide several benefits:
It prevents the system microprocessor from starting to
operate with insufficient voltage.
It prevents the processor from operating prior to
stabilization of the oscillator.
It ensures that the monitored device is held out of
operation until internal registers are properly loaded.
It allows time for an FPGA to download its configuration
prior to initialization of the circuit.
Adjusting POR Timeout via C
POR
Pin
On the ISL88011 and ISL88014, users can adjust the Power
On Reset timeout delay (t
POR
) up to many times the normal
t
POR
of 250ms. To do this, connect a capacitor between
C
POR
and ground (see Figure 3). For example, connecting a
30pF capacitor to C
POR
will increase t
POR
from a typical
250ms to about 2.5s.
NOTE:
Care should be taken in PCB
layout and capacitor placement in order to reduce stray
capacitance as much as possible, which lengthens the t
POR
timeout period.
Manual Reset
The manual reset input (MR) allows the user to trigger a
reset by using a push-button switch. The MR input is an
active-low debounced input. By connecting a push-button
directly from MR to ground, the designer adds manual
system reset capability (see Figure 4). Reset is asserted if
the MR pin is pulled low to less than 100mV for 1
μ
s or longer
while the push-button is closed. After MR is released, the
reset outputs remain asserted for t
POR
(200ms) and then
released.
Watchdog Timer
The Watchdog Timer circuit checks microprocessor activity
by monitoring the WDI input pin. The microprocessor must
periodically toggle the WDI pin within t
WDT
(1.6s nominal),
otherwise the reset signal is asserted (see Figure 5).
Internally, the 1.6s timer is cleared by either a reset or by
toggling the WDI input.
Besides the 1.6s default timeout during normal operation,
these devices also have a longer 51s timeout for startup.
During this time, a reset cannot be asserted due to the WDI
not being toggled. The longer delay at power-on allows an
operating system to boot, an FPGA to initialize, or the
system software to initialize without the burden of dealing
with the Watchdog.
Symbol Table
0
2
3
5
0
10
20
30
C
POR
(pF)
t
P
ISL88011
C
POR
ISL88014
FIGURE 3. ADJUSTING t
POR
WITH A CAPACITOR
40
50
60
70
80
4
1
6
V
DD
RST/MR
PB
ISL88012
ISL88013
ISL88014
ISL88015
R
pu
ISL88011
FIGURE 4. CONNECTING A MANUAL RESET PUSH-BUTTON
WAVEFORM
INPUTS
OUTPUTS
Must be
steady
Will be
steady
May change
from LOW
to HIGH
May change
from HIGH
to LOW
Will change
from LOW
to HIGH
Will change
from HIGH
to LOW
Don’t Care:
Changes
Allowed
N/A
Changing:
State Not
Known
Center Line
is High
Impedance
ISL88011, ISL88012, ISL88013, ISL88014, ISL88015
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ISL88013IH546Z-TK | 5 Ld Voltage Supervisors with Adjustable Power-On Reset, Dual Voltage Monitoring or Watchdog Timer Capability |
| ISL88014IH5Z-TK | 5 Ld Voltage Supervisors with Adjustable Power-On Reset, Dual Voltage Monitoring or Watchdog Timer Capability |
| ISL88015 | 5 Ld Voltage Supervisors with Adjustable Power-On Reset, Dual Voltage Monitoring or Watchdog Timer Capability(帶可調(diào)上電復(fù)位，雙電壓監(jiān)控/看門(mén)狗定時(shí)器的5 Ld電壓監(jiān)控器) |
| ISL88013 | 5 Ld Voltage Supervisors with Adjustable Power-On Reset, Dual Voltage Monitoring or Watchdog Timer Capability(帶可調(diào)上電復(fù)位，雙電壓監(jiān)控/看門(mén)狗定時(shí)器的5 Ld電壓監(jiān)控器) |
| ISL88014 | 5 Ld Voltage Supervisors with Adjustable Power-On Reset, Dual Voltage Monitoring or Watchdog Timer Capability(帶可調(diào)上電復(fù)位，雙電壓監(jiān)控/看門(mén)狗定時(shí)器的5 Ld電壓監(jiān)控器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ISL88013IH546Z | 制造商:Rochester Electronics LLC 功能描述: 制造商:Intersil Corporation 功能描述: |
| ISL88013IH546Z-T7A | 功能描述:IC VOLT MONITR WATCHDOG SOT23-5 RoHS:是 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 類型:簡(jiǎn)單復(fù)位/加電復(fù)位 監(jiān)視電壓數(shù)目:1 輸出:開(kāi)路漏極或開(kāi)路集電極 復(fù)位:低有效 復(fù)位超時(shí):最小為 600 ms 電壓 - 閥值:3.8V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:SC-74A，SOT-753 供應(yīng)商設(shè)備封裝:SOT-23-5 包裝:帶卷 (TR) |
| ISL88013IH546Z-TK | 功能描述:IC VOLTAGE MONITOR DUAL SOT23-5 RoHS:是 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 標(biāo)準(zhǔn)包裝:50 系列:- 類型:簡(jiǎn)單復(fù)位/加電復(fù)位 監(jiān)視電壓數(shù)目:1 輸出:開(kāi)路漏極或開(kāi)路集電極 復(fù)位:低有效 復(fù)位超時(shí):最小為 130 ms 電壓 - 閥值:4.25V 工作溫度:-40°C ~ 85°C 安裝類型:通孔 封裝/外殼:8-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:8-PDIP 包裝:管件 |
| ISL88014EVAL1Z | 功能描述:EVALUATION BOARD FOR ISL88014 RoHS:是 類別:編程器，開(kāi)發(fā)系統(tǒng) >> 評(píng)估演示板和套件 系列:- 標(biāo)準(zhǔn)包裝:1 系列:PCI Express® (PCIe) 主要目的:接口，收發(fā)器，PCI Express 嵌入式:- 已用 IC / 零件:DS80PCI800 主要屬性:- 次要屬性:- 已供物品:板 |
| ISL88014IH5Z | 制造商:Intersil Corporation 功能描述: |
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