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參數(shù)資料
| 型號(hào)： | ISL9011IRSNZ |
| 廠商： | Intersil Corporation |
| 英文描述： | Dual LDO with Low Noise, Low IQ, and High PSRR |
| 中文描述： | 雙路LDO穩(wěn)壓器具有低噪音，低智商，及高PSRR |
| 文件頁數(shù)： | 9/12頁 |
| 文件大小： | 287K |
| 代理商： | ISL9011IRSNZ |
9
FN9219.1
October 13, 2005
Pin Description
Typical Application
PIN #
PIN
NAME
TYPE
DESCRIPTION
1
VIN
Analog I/O
Supply Voltage / LDO Input:
Connect a 1
μ
F capacitor to GND.
2
EN1
Low Voltage Compatible
CMOS Input
LDO-1 Enable.
3
EN2
Low Voltage Compatible
CMOS Input
LDO-2 Enable.
4
CBYP
Analog I/O
Reference Bypass Capacitor Pin:
Optionally connect capacitor of value 0.01
μ
F to 1
μ
F between this pin and GND to tune in the
desired noise and PSRR performance.
5, 7, 8
NC
NC
No Connection
6
GND
Ground
GND is the connection to system ground. Connect to PCB Ground plane.
9
VO2
Analog I/O
LDO-2 Output:
Connect capacitor of value 1
μ
F to 10
μ
F to GND (1μF recommended).
10
VO1
Analog I/O
LDO-1 Output:
Connect capacitor of value 1
μ
F to 10
μ
F to GND (1μF recommended).
C1, C3, C4: 1
μ
F X5R ceramic capacitor
C2: 0.1
μ
F X5R ceramic capacitor
ISL9011
VIN
EN1
EN2
CBYP
NC
VO1
VO2
NC
NC
GND
10
9
8
7
6
1
2
3
4
5
VIN (2.3-6.5V)
Enable 1
Enable 2
Vout 1
Vout 2
C1
C2
C3
C4
OFF
ON
OFF
ON
ISL9011
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| ISL9011IRSNZ-T | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Dual LDO with Low Noise, Low IQ, and High PSRR |
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