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參數(shù)資料
型號(hào): ISL90726UIE627Z
廠商: Intersil
文件頁數(shù): 5/8頁
文件大?。?/td> 0K
描述: IC XDCP 128-TAP 50KOHM SC70-6
產(chǎn)品培訓(xùn)模塊: Digitally Controlled Potentiometers
Solutions for Industrial Control Applications
標(biāo)準(zhǔn)包裝: 1
系列: XDCP™
接片: 128
電阻(歐姆): 50k
電路數(shù): 1
溫度系數(shù): 標(biāo)準(zhǔn)值 ±45 ppm/°C
存儲(chǔ)器類型: 易失
接口: I²C
電源電壓: 2.7 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 6-TSSOP,SC-88,SOT-363
供應(yīng)商設(shè)備封裝: SC-70-6
包裝: 管件
5
FN8244.4
August 26, 2008
SDA vs SCL Timing
Principles of Operation
The ISL90726 is an integrated circuit incorporating one DCP
with its associated registers and an I2C serial interface
providing direct communication between a host and the
potentiometer.
DCP Description
The DCP is implemented with a combination of resistor
elements and CMOS switches. The physical ends of the DCP
are equivalent to the fixed terminals of a mechanical
potentiometer (RH and RL pins). The RW pin of the DCP is
connected to intermediate nodes, and is equivalent to the wiper
terminal of a mechanical potentiometer. The position of the
wiper terminal within the DCP is controlled by an 7-bit volatile
Wiper Register (WR). The DCP has its own WR. When the WR
of the DCP contains all zeroes (WR<6:0> = 00h), its wiper
terminal (RW) is closest to its “Low” terminal (RL). When the
WR of the DCP contains all ones (WR<6:0> = 7Fh), its wiper
terminal (RW) is closest to its “High” terminal (RH). As the
value of the WR increases from all zeroes (00h) to all ones
(127 decimal), the wiper moves monotonically from the
position closest to RL to the position closest to RH. RH is not
connected to a device pin. The net effect is the resistance
between RW and RL increases monotonically.
While the ISL90726 is being powered up, the WR is reset to
40h (64 decimal), which locates RW roughly at the center
between RL and RH.
The WR and IVR can be read or written directly using the
I2C serial interface as described in the following sections.
Cb (Note 11)
Capacitive Loading of SDA or
SCL
Total on-chip and off-chip
10
400
pF
Rpu (Note 11)
SDA and SCL Bus Pull-up
Resistor Off-chip
Maximum is determined by tR and tF.
For Cb = 400pF, max is about 2k
Ω ~ 2.5kΩ.
For Cb = 40pF, max is about 15k
Ω ~ 20kΩ.
1k
Ω
NOTES:
2. Typical values are for TA = +25°C and 3.3V supply voltage.
3. LSB: [V(RW)127 – V(RW)0]/127. V(RW)127 and V(RW)0 are V(RW) for the DCP register set to FF hex and 00 hex respectively. LSB is the
incremental voltage when changing from one tap to an adjacent tap.
4. MI =
|R127 – R0|/127. R127 and R0 are the measured resistances for the DCP register set to FF hex and 00 hex respectively.
ROFFSET = R0/MI, when measuring between RW and RL.
5. ROFFSET = R127/MI, when measuring between RW and RH.
6. RDNL = (Ri – Ri-1)/MI, for i = 32 to 127.
7. RINL = [Ri – (MI i) – R0]/MI, for i = 32 to 127.
8.
for i = 32 to 127, T = -40°C to +85°C. Max( ) is the maximum value of the resistance and Min ( ) is
the minimum value of the resistance over the temperature range.
9. This parameter is not 100% tested.
10. VIL = 0V, VIH = VCC.
11. These are I2C-specific parameters and are not directly tested. However, they are used in the device testing to validate specifications.
12. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by
characterization and are not production tested.
Operating Specifications
(Continued)
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
(Note 12)
TYP
(Note 2)
MAX
(Note 12) UNIT
TC
R
Max Ri
() Min Ri
()
[]
Max Ri
() Min Ri
()
+
[] 2
----------------------------------------------------------------
10
6
+125°C
---------------------
×
=
tSU:STO
tDH
tHIGH
tSU:STA
tHD:STA
tHD:DAT
tSU:DAT
SCL
SDA
(INPUT TIMING)
SDA
(OUTPUT TIMING)
tF
tLOW
tBUF
tAA
tR
ISL90726
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