tF (Note 18) SDA and SCL Fall Time
參數(shù)資料
型號(hào): ISL90727UIE627Z-TK
廠商: Intersil
文件頁(yè)數(shù): 5/8頁(yè)
文件大?。?/td> 0K
描述: IC POT DGTL 50K OHM SC70-6
產(chǎn)品培訓(xùn)模塊: Digitally Controlled Potentiometers
標(biāo)準(zhǔn)包裝: 1
系列: XDCP™
接片: 128
電阻(歐姆): 50k
電路數(shù): 1
溫度系數(shù): 標(biāo)準(zhǔn)值 ±45 ppm/°C
存儲(chǔ)器類型: 易失
接口: I²C
電源電壓: 2.7 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 6-TSSOP,SC-88,SOT-363
供應(yīng)商設(shè)備封裝: SC-70-6
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: ISL90727UIE627Z-TKDKR
5
FN8247.8
May 10, 2012
SDA vs SCL Timing
tF (Note 18)
SDA and SCL Fall Time
From 70% to 30% of VCC
20 +
0.1*Cb
250
ns
Cb (Note 18)
Capacitive Loading of SDA or SCL
Total on-chip and off-chip
10
400
pF
Rpu (Note 18)
SDA and SCL Bus Pull-up Resistor
Off-chip
Maximum is determined by tR and tF.
For Cb = 400pF, max is about 2k
Ω ~ 2.5kΩ.
For Cb = 40pF, max is about 15k
Ω ~ 20kΩ
1k
Ω
NOTES:
7. Typical values are for TA = +25°C and 3.3V supply voltage.
8. LSB: [V(RW)127 – V(RW)0]/127. V(RW)127 and V(RW)0 are V(RW) for the DCP register set to FF hex and 00 hex respectively. LSB is the
incremental voltage when changing from one tap to an adjacent tap.
9. ZS error = V(RW)0/LSB.
10. FS error = [V(RW)127 – VCC]/LSB.
11. MI =
|R127 – R0|/127. R127 and R0 are the measured resistances for the DCP register set to FF hex and 00 hex respectively.
ROFFSET = R0/MI, when measuring between RW and RL.
12. ROFFSET = R127/MI, when measuring between RW and RH.
13. RDNL = (Ri – Ri-1)/MI - 1, for i = 32 to 127.
14. RINL = [Ri – (MI i) – R0]/MI, for i = 32 to 127.
15.
for i = 32 to 127, T = -40°C to +85°C. Max( ) is the maximum value of the resistance and Min ( ) is the
minimum value of the resistance over the temperature range.
16. This parameter is not 100% tested.
17. VIL = 0V, VIH = VCC.
18. These are I2C-specific parameters and are not directly tested, however, they are used in the device testing to validate specifications.
19. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
20. The ramp must be >0.2V/ms at any voltage <2.7V starting from 0VDC. A power down to any voltage other than 0V is not included in the ramp
rate spec and may result in improper operation.
Operating Specifications
(Continued)
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
(Note 19)
TYP
(Note 7)
MAX
(Note 19) UNIT
TC
R
Max Ri
() Min Ri
()
[]
Max Ri
() Min Ri
()
+
[] 2
----------------------------------------------------------------
10
6
+125°C
---------------------
×
=
tSU:STO
tDH
tHIGH
tSU:STA
tHD:STA
tHD:DAT
tSU:DAT
SCL
SDA
(INPUT TIMING)
SDA
(OUTPUT TIMING)
tF
tLOW
tBUF
tAA
tR
ISL90727, ISL90728
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