參數(shù)資料
型號(hào): ISL95810WIRT8Z-T
廠商: Intersil
文件頁(yè)數(shù): 3/13頁(yè)
文件大?。?/td> 0K
描述: IC XDCP 256-TAP 10KOHM 8-TDFN
標(biāo)準(zhǔn)包裝: 6,000
系列: XDCP™
接片: 256
電阻(歐姆): 10k
電路數(shù): 1
溫度系數(shù): 標(biāo)準(zhǔn)值 ±45 ppm/°C
存儲(chǔ)器類型: 非易失
接口: I²C
電源電壓: 2.7 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-WDFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 8-TDFN(3x3)
包裝: 帶卷 (TR)
11
FN8090.2
September 19, 2006
received. If the Address Byte is 0 or 2, the Data Byte is
transferred to the Wiper Register (WR) or to the Access
Control Register respectively, at the falling edge of the SCL
pulse that loads the last bit (LSB) of the Data Byte. If the
Address Byte is 0, and the Access Control Register is all
zeros (default), then the STOP condition initiates the internal
write cycle to non-volatile memory.
Read Operation
A Read operation consist of a three byte instruction followed
by one or more Data Bytes (See Figure 18). The master
initiates the operation issuing the following sequence: a
START, the Identification byte with the R/W bit set to “0”, an
Address Byte, a second START, and a second Identification
byte with the R/W bit set to “1”. After each of the three bytes,
the ISL95810 responds with an ACK. Then the ISL95810
then transmits the Data Byte. The master then terminates
the read operation (issuing a STOP condition) following the
last bit of the Data Byte (See Figure 18).
The byte at address 02h determines if the Data Bytes being
read are from volatile or non-volatile memory (See “Memory
ISL95810
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ISL95810WIU8-T 功能描述:IC XDCP SGL 256-TAP 10KOHM 8MSOP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)字電位器 系列:XDCP™ 標(biāo)準(zhǔn)包裝:2,500 系列:XDCP™ 接片:256 電阻(歐姆):100k 電路數(shù):1 溫度系數(shù):標(biāo)準(zhǔn)值 ±300 ppm/°C 存儲(chǔ)器類型:非易失 接口:I²C(設(shè)備位址) 電源電壓:2.7 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:14-TSSOP(0.173",4.40mm 寬) 供應(yīng)商設(shè)備封裝:14-TSSOP 包裝:帶卷 (TR)
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