參數(shù)資料
型號： ISP1161A
廠商： NXP Semiconductors N.V.
英文描述： Full-speed Universal Serial Bus single-chip host and device controller
中文描述： 全速通用串行總線的單芯片主機和設(shè)備控制器
文件頁數(shù)： 52/134頁
文件大?。?/td> 587K
代理商： ISP1161A
Philips Semiconductors
ISP1161A
Full-speed USB single-chip host and device controller
Product data
Rev. 03 — 23 December 2004
52 of 134
9397 750 13962
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
10.2 HC frame counter registers
10.2.1
HcFmInterval register (R/W: 0DH/8DH)
The HcFmInterval register contains a 14-bit value which indicates the bit time interval
in a frame (that is, between two consecutive SOFs), and a 15-bit value indicating the
full-speed maximum packet size that the HC may transmit or receive without causing
a scheduling overrun. The HCD may carry out minor adjustments on the
FrameInterval by writing a new value at each SOF. This allows the HC to synchronize
with an external clock source and to adjust any unknown clock offset.
Code (Hex): 0D —
read
Code (Hex): 8D —
write
Table 20:
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
HcFmInterval register: bit allocation
31
FIT
0
R/W
23
30
29
28
27
26
25
24
FSMPS[14:8]
0
R/W
19
FSMPS[7:0]
0
0
0
0
0
0
R/W
22
R/W
21
R/W
20
R/W
18
R/W
17
R/W
16
0
0
0
0
0
0
0
0
R/W
15
R/W
14
R/W
13
R/W
12
R/W
11
R/W
10
R/W
9
R/W
8
reserved
FI[13:8]
0
0
1
0
1
1
1
0
R/W
7
R/W
6
R/W
5
R/W
4
R/W
3
R/W
2
R/W
1
R/W
0
FI[7:0]
1
1
0
1
1
1
1
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Table 21:
Bit
31
HcFmInterval register: bit description
Symbol
Description
FIT
FrameIntervalToggle:
The HCD toggles this bit whenever it loads
a new value to FrameInterval.
FSMPS
[14:0]
value which is loaded into the Largest Data Packet Counter at the
beginning of each frame. The counter value represents the largest
amount of data in bits which can be sent or received by the HC in a
single transaction at any given time without causing a scheduling
overrun. The field value is calculated by the HCD.
-
reserved
FI[13:0]
FrameInterval:
Specifies the interval between two consecutive
SOFs in bit times. The default value is 11999. The HCD must save
the current value of this field before resetting the HC. Setting the
HostControllerReset of the HcCommandStatus register will cause
the HC to reset this field to its default value. HCD may choose to
restore the saved value upon completing the Reset sequence.
30 to 16
FSLargestDataPacket (FSMaximumPacketSize):
Specifies a
15 to 14
13 to 0
相關(guān)PDF資料
PDF描述
ISP1161ABD Full-speed Universal Serial Bus single-chip host and device controller
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ISP1161A1BD Universal Serial Bus single-chip host and device controller
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ISP1161A1 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Universal Serial Bus single-chip host and device controller
ISP1161A1BD 功能描述:IC USB HOST/DEVICE CTRLR 64-LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標準包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A
ISP1161A1BD,118 功能描述:USB 接口集成電路 USB1.1 HOST &DEVICE RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1161A1BD,151 功能描述:USB 接口集成電路 USB1.1 HOST &DEVICE RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1161A1BD,157 功能描述:USB 接口集成電路 DO NOT USE ORDER -S OR -T PART RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
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