參數(shù)資料
型號: ISP1183BS
廠商: NXP SEMICONDUCTORS
元件分類: 總線控制器
英文描述: Low-power Universal Serial Bus interface device with DMA
中文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQCC32
封裝: 5 X 5 MM, 0.85 MM HEIGHT, PLASTIC, MO-220, SOT-617-1, HVQFN-32
文件頁數(shù): 25/62頁
文件大小: 295K
代理商: ISP1183BS
Philips Semiconductors
ISP1183
Low-power USB interface device with DMA
Product data
Rev. 01 — 24 February 2004
25 of 62
9397 750 11804
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
13. Commands and registers
The functions and registers of the ISP1183 are accessed using commands, which
consist of a command code followed by optional data bytes (read or write action). An
overview of the available commands and registers is given in
Table 13
.
A complete access consists of two phases:
1.
Command phase
: when address pin A0 = HIGH, the ISP1183 interprets the
data on the lower byte of the bus pins D[7:0] as a command code. Commands
without a data phase are immediately executed.
2.
Data phase (optional)
: when address pin A0 = LOW, the ISP1183 transfers the
data on the bus to or from a register or endpoint FIFO. Multibyte registers are
accessed least significant byte or word first.
Table 13:
Name
Command and register summary
Destination
Code
(hex)
Transaction
Reference
Initialization commands
Write Control OUT
Configuration
Write Control IN Configuration
Endpoint Configuration
register endpoint 0 OUT
Endpoint Configuration
register endpoint 0 IN
Endpoint Configuration
register endpoints 1 to 14
Endpoint Configuration
register endpoint 0 OUT
Endpoint Configuration
register endpoint 0 IN
Endpoint Configuration
register endpoints 1 to 14
Address register
Mode register
Hardware Configuration
register
Interrupt Enable register
20
write 1 byte
Section 13.1.1 on page 27
21
write 1 byte
Write Endpoint n Configuration
(n = 1 to 14)
Read Control OUT
Configuration
Read Control IN Configuration
22 to 2F
write 1 byte
30
read 1 byte
31
read 1 byte
Read Endpoint n Configuration
(n = 1 to 14)
Write or read Device Address
Write or read Mode register
Write or read Hardware
Configuration
Write or read Interrupt Enable
register
Reset Device
32 to 3F
read 1 byte
B6/B7
B8/B9
BA/BB
write or read 1 byte
write or read 1 byte
write or read 2 bytes
Section 13.1.2 on page 28
Section 13.1.3 on page 29
Section 13.1.4 on page 29
C2/C3
write or read 4 bytes
Section 13.1.5 on page 30
resets all registers
F6
-
Section 13.1.6 on page 32
相關PDF資料
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