Specifications ispLSI 1016EA USE ispMA CH 4A5 FOR NEW 5V DESIGNS Power Consumption Power consumption in the ispLSI 1016EA device de- pends o" />
參數(shù)資料
型號: ISPLSI 1016EA-200LJ44
廠商: Lattice Semiconductor Corporation
文件頁數(shù): 2/13頁
文件大?。?/td> 0K
描述: IC PLD ISP 32I/O 200MHZ 44PLCC
標(biāo)準(zhǔn)包裝: 26
系列: ispLSI® 1000EA
可編程類型: 系統(tǒng)內(nèi)可編程
最大延遲時間 tpd(1): 4.5ns
電壓電源 - 內(nèi)部: 4.75 V ~ 5.25 V
邏輯元件/邏輯塊數(shù)目: 16
門數(shù): 2000
輸入/輸出數(shù): 32
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 44-LCC(J 形引線)
供應(yīng)商設(shè)備封裝: 44-PLCC(16.58x16.58)
包裝: 管件
其它名稱: ISPLSI1016EA-200LJ44
10
Specifications ispLSI 1016EA
USE
ispMA
CH
4A5
FOR
NEW
5V
DESIGNS
Power Consumption
Power consumption in the ispLSI 1016EA device de-
pends on two primary factors: the speed at which the
device is operating and the number of Product Terms
used. Figure 4 shows the relationship between power
and operating speed.
90
80
120
0
50
100
150
200
250
fmax (MHz)
I CC
(mA)
Notes: Configuration of four 16-bit counters
Typical current at 5V, 25°C
ispLSI 1016EA
110
0127/1016EA
ICC can be estimated for the ispLSI 1016EA using the following equation:
ICC(mA) = 23 + (# of PTs * 0.52) + (# of nets * max freq * 0.004)
Where:
# of PTs = Number of product terms used in design
# of nets = Number of signals used in device
Max freq = Highest clock frequency to the device (in MHz)
The ICC estimate is based on typical conditions (VCC = 5.0V, room temperature) and an assumption of four GLB loads
on average exists and the device is filled with four 16-bit counters. These values are for estimates only. Since the
value of ICC is sensitive to operating conditions and the program in the device, the actual ICC should be verified.
130
140
150
100
Figure 4. Typical Device Power Consumption vs fmax
Maximum GRP Delay vs GLB Loads
GLB Load
ispLSI 1016EA-200
ispLSI 1016EA-125
ispLSI 1016EA-100
3
4
18
16
GRP
Delay
(ns)
4
2
GRP/GLB/1016EA
1
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