Specifications ispLSI 2032VE 10 Power Consumption Power consumption in the ispLSI 2032VE device de- pends on two primary factors: the speed at " />
參數(shù)資料
型號(hào): ISPLSI 2032VE-225LT44
廠商: Lattice Semiconductor Corporation
文件頁(yè)數(shù): 3/16頁(yè)
文件大?。?/td> 0K
描述: IC PLD ISP 32I/O 4NS 44TQFP
標(biāo)準(zhǔn)包裝: 160
系列: ispLSI® 2000VE
可編程類型: 系統(tǒng)內(nèi)可編程
最大延遲時(shí)間 tpd(1): 4.0ns
電壓電源 - 內(nèi)部: 3 V ~ 3.6 V
邏輯元件/邏輯塊數(shù)目: 8
宏單元數(shù): 32
門數(shù): 1000
輸入/輸出數(shù): 32
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 44-TQFP
供應(yīng)商設(shè)備封裝: 44-TQFP(10x10)
包裝: 托盤
其它名稱: ISPLSI2032VE-225LT44
Specifications ispLSI 2032VE
10
Power Consumption
Power consumption in the ispLSI 2032VE device de-
pends on two primary factors: the speed at which the
device is operating and the number of product terms
used. Figure 3 shows the relationship between power
and operating speed.
Figure 3. Typical Device Power Consumption vs fmax
0127A/2032VE
ICC can be estimated for the ispLSI 2032VE using the following equation:
For ispLSI 2032VE-300 and -225: ICC(mA) = 4.5 + (# of PTs * 1.29) + (# of nets * Fmax * 0.0068)
For ispLSI 2032VE-180 and slower: ICC(mA) = 4.5 + (# of PTs * 1.05) + (# of nets * Fmax * 0.0068)
Where:
# of PTs = Number of product terms used in design
# of nets = Number of signals used in device
Max freq = Highest clock frequency to the device (in MHz)
The ICC estimate is based on typical conditions (VCC = 3.3V, room temperature) and an assumption of two
GLB loads on average exists. These values are for estimates only. Since the value of ICC is sensitive to
operating conditions and the program in the device, the actual ICC should be verified.
Notes: Configuration of two 16-bit counters
Typical current at 3.3V, 25° C
ispLSI 2032VE-300 and -225
ispLSI 2032VE-180
and slower
75
125
025
50
75
100
125
150
175
200
225
250
275
300
fmax (MHz)
I CC
(mA)
150
100
25
50
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