參數(shù)資料
型號(hào): K4H560838E-NLB3
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 256Mb E-die DDR SDRAM Specification 54pin sTSOP(II)
中文描述: 256Mb的電子芯片DDR SDRAM內(nèi)存規(guī)格54pin sTSOP(二)
文件頁數(shù): 13/19頁
文件大?。?/td> 171K
代理商: K4H560838E-NLB3
DDR SDRAM
DDR SDRAM 256Mb F-die (x8, x16)
Rev. 1.1 August. 2003
AC Operating Conditions
Parameter/Condition
Symbol
VIH(AC)
VIL(AC)
VID(AC)
VIX(AC)
Min
Max-10
Unit
V
V
V
V
Note
Input High (Logic 1) Voltage, DQ, DQS and DM signals
Input Low (Logic 0) Voltage, DQ, DQS and DM signals.
Input Differential Voltage, CK and CK inputs
Input Crossing Point Voltage, CK and CK inputs
VREF + 0.31
VREF - 0.31
VDDQ+0.6
0.5*VDDQ+0.2
0.7
1
2
0.5*VDDQ-0.2
AC
Overshoot/Undershoot specification for Address and Control Pins
Parameter
Specification
DDR400
1.5V
1.5V
4.5V-ns
4.5V-ns
Maximum peak amplitude allowed for overshoot
Maximum peak amplitude allowed for undershoot
The area between the overshoot signal and VDD must be less than or equal to
The area between the undershoot signal and GND must be less than or equal to
5
4
3
2
1
0
-1
-2
-3
-4
-5
0
0.5
0.6875
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
6.3125
6.5
7.0
VDD
Overshoot
Maximum Amplitude = 1.5V
Area = 4.5V-ns
Maximum Amplitude = 1.5V
undershoot
GND
V
Tims(ns)
AC overshoot/Undershoot Definition
Notes :
1. VID is the magnitude of the difference between the input level on CK and the input level on /CK.
2. The value of VIX is expected to equal 0.5*VDDQ of the transmitting device and must track variations in the dc level of the same.
相關(guān)PDF資料
PDF描述
K4H560838E-TCA0 10-Bit, 38 kSPS ADC Serial Out, On-Chip System Clock, 11 Ch. 20-SOIC
K4H560838E-TCA2 128Mb DDR SDRAM
K4H560838E-TCB0 10-Bit, 38 kSPS ADC Serial Out, On-Chip System Clock, 11 Ch. 20-PLCC
K4H560838E-TLA0 128Mb DDR SDRAM
K4H560838E-TLA2 10-Bit, 38 kSPS ADC Serial Out, On-Chip System Clock, 11 Ch. 20-SOIC
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