參數(shù)資料
型號: K6R4008V1D-JI10
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 256Kx16 Bit High Speed Static RAM(5.0V Operating). Operated at Commercial and Industrial Temperature Ranges.
中文描述: 256Kx16位高速靜態(tài)RAM(5.0V操作)。在經(jīng)營商業(yè)和工業(yè)溫度范圍。
文件頁數(shù): 3/12頁
文件大小: 139K
代理商: K6R4008V1D-JI10
K6R4016C1D
CMOS SRAM
PRELIMPreliminaryPPPPPPPPPINARY
Rev 2.0
June 2003
- 3 -
256K x 16 Bit High-Speed CMOS Static RAM
FEATURES
Fast Access Time 10ns(Max.)
Low Power Dissipation
Standby (TTL) : 20mA(Max.)
(CMOS) : 5mA(Max.)
Operating K6R4016C1D-10 : 65mA(Max.)
Single 5.0V
±
10
%
Power Supply
TTL Compatible Inputs and Outputs
Fully Static Operation
- No Clock or Refresh required
Three State Outputs
Center Power/Ground Pin Configuration
Data Byte Control : LB : I/O1~ I/O8, UB : I/O9~ I/O16
Standard Pin Configuration
K6R4016C1D-J : 44-SOJ-400
K6R4016C1D-K : 44-SOJ-400(Lead-Free)
K6R4016C1D-T : 44-TSOP2-400BF
K6R4016C1D-U : 44-TSOP2-400BF (Lead-Free)
K6R4016C1D-E : 48-TBGA with 0.75 Ball pitch
(7mm X 9mm)
Operating in Commercial and Industrial Temperature range.
The K6R4016C1D is a 4,194,304-bit high-speed Static Ran-
dom Access Memory organized as 262,144 words by 16 bits.
The K6R4016C1D uses 16 common input and output lines and
has an output enable pin which operates faster than address
access time at read cycle. Also it allows that lower and upper
byte access by data byte control(UB, LB). The device is fabri-
cated using SAMSUNG
s advanced CMOS process and
designed for high-speed circuit technology. It is particularly well
suited for use in high-density high-speed system applications.
The K6R4016C1D is packaged in a 400mil 44-pin plastic SOJ
or TSOP(II) forward or 48 T BGA.
GENERAL DESCRIPTION
Clk Gen.
I/O
1
~I/O
8
OE
UB
LB
CS
FUNCTIONAL BLOCK DIAGRAM
R
Data
Cont.
Column Select
CLK
Gen.
Pre-Charge Circuit
Memory Array
1024 Rows
256 x 16 Columns
I/O Circuit &
I/O
9
~I/O
16
Data
Cont.
WE
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
A
9
A
10
A
11
A
12
A
13
A
14
A
15
A
16
A
17
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