參數(shù)資料
型號(hào): K6X4008C1F-MB55
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 512Kx8 bit Low Power full CMOS Static RAM
中文描述: 512Kx8位充分的CMOS低功耗靜態(tài)存儲(chǔ)器
文件頁(yè)數(shù): 2/9頁(yè)
文件大?。?/td> 177K
代理商: K6X4008C1F-MB55
K6X4008C1F Family
CMOS SRAM
Revision 1.0
September 2003
2
512Kx8 bit Low Power full CMOS Static RAM
GENERAL DESCRIPTION
The K6X4008C1F families are fabricated by SAMSUNG
s
advanced full CMOS process technology. The families sup-
ports various operating temperature range and various
package types for user flexibility of system design. The fam-
ilies also support low data retention voltage for battery back-
up operation with low data retention current.
FEATURES
Process Technology: Full CMOS
Organization: 512Kx8
Power Supply Voltage: 4.5~5.5V
Low Data Retention Voltage: 2V(Min)
Three state output and TTL compatible
Package Type: 32-DIP-600, 32-SOP-525,
32-TSOP2-400F/R
PIN DESCRIPTION
Pin Name
Function
WE
Write Enable Input
CS
Chip Select Input
OE
Output Enable Input
A
0
~A
18
Address Inputs
I/O
1
~I/O
8
Data Inputs/Outputs
Vcc
Power
Vss
Ground
PRODUCT FAMILY
1. The parameter is measured with 50pF test load.
Product Family
Operating Temperature
Vcc Range
Speed
Power Dissipation
PKG Type
Standby
(I
SB1
, Max)
Operating
(I
CC2
, Max)
K6X4008C1F-B
Commercial (0~70
°
C
)
4.5~5.5V
55
1)
/70ns
20
μ
A
30mA
32-DIP-600, 32-SOP-525,
32-TSOP2-400F/R
K6X4008C1F-F
Industrial (-40~85
°
C
)
K6X4008C1F-Q
Automotive (-40~125
°
C
)
30
μ
A
32-SOP-525, 32-TSOP2-400F
FUNCTIONAL BLOCK DIAGRAM
32-DIP
32-SOP
32-TSOP2
(Forward)
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O1
I/O2
I/O3
VSS
VCC
A15
WE
A13
A8
A9
A11
OE
A10
CS
I/O8
I/O7
I/O6
I/O5
I/O4
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32-TSOP2
(Reverse)
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O1
I/O2
I/O3
VSS
VCC
A15
WE
A13
A8
A9
A11
OE
A10
CS
I/O8
I/O7
I/O6
I/O5
I/O4
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
A18
A17
A17
A18
SAMSUNG ELECTRONICS CO., LTD.
reserves the right to change products and specifications without notice.
Precharge circuit.
Memory array
I/O Circuit
Column select
Clk gen.
Row
select
I/O
1
Data
cont
Data
cont
I/O
8
CS
WE
OE
Control
logic
Row
Addresses
Column Addresses
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