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參數(shù)資料
| 型號： | K7I643684M-EI25 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 72Mb DDRII SRAM Specification |
| 中文描述： | 72Mb SRAM的規(guī)范條DDRII |
| 文件頁數(shù)： | 5/18頁 |
| 文件大?。?/td> | 424K |
| 代理商： | K7I643684M-EI25 |
2Mx36 & 4Mx18 DDRII CIO b4 SRAM
K7I643684M
K7I641884M
- 5 -
Rev. 1.3 March 2007
PIN CONFIGURATIONS
(TOP VIEW)
K7I641884M(2Mx18)
Notes:
2. BW
0
controls write to DQ0:DQ8 and BW
1
controls write to DQ9:DQ17.
1
2
3
4
5
6
K
K
7
8
9
10
SA
NC
DQ7
NC
NC
NC
NC
V
REF
DQ4
NC
NC
DQ1
NC
NC
TMS
11
CQ
DQ8
NC
NC
DQ6
DQ5
NC
ZQ
NC
DQ3
DQ2
NC
NC
DQ0
TDI
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
CQ
NC
NC
NC
NC
NC
NC
Doff
NC
NC
NC
NC
NC
NC
TDO
SA
DQ9
NC
NC
NC
DQ12
NC
V
REF
NC
NC
DQ15
NC
NC
NC
TCK
SA
NC
NC
DQ10
DQ11
NC
DQ13
V
DDQ
NC
DQ14
NC
NC
DQ16
DQ17
SA
R/W
SA
V
SS
V
SS
V
DDQ
V
DDQ
V
DDQ
V
DDQ
V
DDQ
V
DDQ
V
DDQ
V
SS
V
SS
SA
SA
BW
1
NC
SA
V
SS
V
SS
V
DD
V
DD
V
DD
V
DD
V
DD
V
SS
V
SS
SA
SA
SA
NC
BW
0
SA1
V
SS
V
SS
V
DD
V
DD
V
DD
V
DD
V
DD
V
SS
V
SS
SA
SA
SA
LD
SA
V
SS
V
SS
V
DDQ
V
DDQ
V
DDQ
V
DDQ
V
DDQ
V
DDQ
V
DDQ
V
SS
V
SS
SA
SA
SA
NC
NC
NC
NC
NC
NC
V
DDQ
NC
NC
NC
NC
NC
NC
SA
SA0
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
SA
C
C
PIN NAME
Notes:
1. C, C, K or K cannot be set to V
REF
voltage.
2. When ZQ pin is directly connected to V
DD
output impedance is set to minimum value
and it
cannot be connected to ground or left unconnected
.
3. Not connected to chip pad internally.
SYMBOL
K, K
C, C
CQ, CQ
Doff
SA0,SA1
SA
PIN NUMBERS
6B, 6A
6P, 6R
11A, 1A
1H
6C,7C
DESCRIPTION
Input Clock
Input Clock for Output Data
Output Echo Clock
DLL Disable when low
Burst Count Address Inputs
Address Inputs
NOTE
1
2A,3A,9A,10A,4B,8B,5C,5N-7N,4P,5P,7P,8P,3R-5R,7R-9R
2B,11B,10C,3D,3E,11E,2F,11F,3G,10J,3K,11K,2L,11L
10M,3N,3P,11P
DQ0-17
Data Inputs Outputs
R/W
4A
Read, Write Control Pin, Read active
when high
LD
8A
Synchronous Load Pin, bus Cycle
sequence is to be defined when low
BW
0
, BW
1
V
REF
ZQ
V
DD
7B, 5A
2H,10H
11H
Block Write Control Pin,active when low
Input Reference Voltage
Output Driver Impedance Control Input
Power Supply (1.8 V)
2
5F,7F,5G,7G,5H,7H,5J,7J,5K,7K
V
DDQ
4E,8E,4F,8F,4G,8G,3H,4H,8H,9H,4J,8J,4K,8K,4L,8L
Output Power Supply (1.5V or 1.8V)
V
SS
4C,8C,4D-8D,5E-7E,6F,6G,6H,6J,6K,5L-7L,4M-8M,4N,8N
Ground
TMS
TDI
TCK
TDO
10R
11R
2R
1R
JTAG Test Mode Select
JTAG Test Data Input
JTAG Test Clock
JTAG Test Data Output
NC
7A,1B,3B,5B,9B,10B,1C,2C,3C,9C,11C,1D,2D,9D,10D,11D
1E,2E,9E,10E,1F,3F,9F,10F,1G,2G,9G,10G,11G
1J,2J,3J,9J,11J,1K,2K,9K,10K,1L,3L,9L,10L
1M,2M,3M,9M,11M,1N,2N,9N,10N,11N,1P,2P,9P,10P
No Connect
3
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| K7I643684M-EI30 | 72Mb DDRII SRAM Specification |
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| K7I643684M-EI30 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:72Mb DDRII SRAM Specification |
| K7I643684M-FC16 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:72Mb DDRII SRAM Specification |
| K7I643684M-FC20 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:72Mb DDRII SRAM Specification |
| K7I643684M-FC25 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:72Mb DDRII SRAM Specification |
| K7I643684M-FC30 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:72Mb DDRII SRAM Specification |
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