參數(shù)資料
型號： KFN2G16Q2M-DEB5
廠商： SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述： MuxOneNAND FLASH MEMORY
中文描述： MuxOneNAND閃存
文件頁數(shù)： 86/124頁
文件大小： 1550K
代理商： KFN2G16Q2M-DEB5
MuxOneNAND1G(KFM1G16Q2M-DEB5)
MuxOneNAND2G(KFN2G16Q2M-DEB5)
FLASH MEMORY
86
An OTP Load Operation accesses the OTP area and transfers identified content from the OTP to the DataRAM on-chip buffer,
thus making the OTP contents available to the Host.
The OTP area is a separate part of the NAND Flash Array memory. It is accessed by issuing OTP Access command(65h) instead of
a Flash Block Address (FBA) command.
After being accessed with the OTP Access Command, the contents of OTP memory area are loaded using the same operations
as a normal load operation to the NAND Flash Array memory (see section 3.6 for more information).
To exit the OTP access mode following an OTP Load Operation, a Cold-, Warm-, Hot-, or NAND Flash Core Reset operation is per-
formed.
OTP Read Operation Flow Chart
Start
Wait for INT register
low to high transition
Add: F241h DQ[15]=INT
Write 0 to interrupt register
Add: F241h DQ=0000h
Write ’FPA, FSA’ of Flash
Add: F107h DQ=FPA, FSA
OTP Reading completed
Write ’Load’ Command
Add: F220h
DQ=0000h or 0013h
Wait for INT register
low to high transition
Add: F241h DQ[15]=INT
Write ’OTP Access’ Command
Add: F220h DQ=0065h
Write ’BSA, BSC’ of DataRAM
Add: F200h DQ=BSA, BSC
OTP Exit
Host reads data from
DataRAM
Note 1) FBA(NAND Flash Block Address) could be any address.
Do Cold/Warm/Hot
/NAND Flash Core Reset
* DFS is for DDP
Write ’DFS*, FBA’ of Flash
1)
Add: F100h DQ=DFS*’, FBA
Write 0 to interrupt register
Add: F241h DQ=0000h
Select DataRAM for DDP
Add: F101h DQ=DBS*
3.11.1 OTP Load Operation
相關(guān)PDF資料
PDF描述
KFM1G16Q2M MuxOneNAND FLASH MEMORY
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
KFN2G16Q2M-DEB6 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:MuxOneNAND FLASH MEMORY
KFN2G16Q2M-DED5 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:MuxOneNAND FLASH MEMORY
KFN2G16Q2M-DED6 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:MuxOneNAND FLASH MEMORY
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