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參數(shù)資料
| 型號： | KH104 |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | DC to 1.1GHz Linear Amplifier |
| 中文描述： | DC到1.1GHz的線性放大器 |
| 文件頁數(shù)： | 5/7頁 |
| 文件大?。?/td> | 238K |
| 代理商： | KH104 |
REV. 1A February 2001
5
KH104
DATA SHEET
voltage across the regulator of 3.6V and a minimum
regulator current of 10mA will satisfy the regulator
dropout voltage and current limits.
Given the maximum anticipated power supply voltages,
the shunt resistor should be calculated to yield a 35mA
current from that voltage to the regulated voltage of 5.4V.
This will leave 10mA through the regulator at the
minimum quiescent current of 45mA. The regulator input
voltages may be reduced directly by dropping the voltage
supplies, or, if that option is not available, using either
a zener or resistive dropping element in series with
the supply.
If a series dropping element is used, the
decoupling capacitors must appear on pins 1 and 2 of the
KH104. Figure 3 shows two possible power reduction
circuits from fixed ±15V supplies.
Several methods of decreasing the thermal resistance
from case to ambient are possible. With no heat paths
other than still air at 25
°
C, the thermal resistance from
case to ambient for the KH104 is about 40
°
C/W. When
placed in a printed circuit board with all ground pins
soldered into a ground plane 1
”
X 1.5
”
, the thermal
resistance drops to about 30
°
C/W In this configuration,
the case rise will be 30
°
C for 9V supplies and 50
°
C
for 16V supplies.
This results in maximum allowable
ambient temperatures of 110
°
C and 90
°
C, respectively. If
higher operating temperatures are required, heat sinking
of the package is recommended.
Figure 3: Reducing Power Dissipation
very low. As the signal frequency increases beyond f
45
,
the op amp loses influence and the KH104 gain and
output impedance dominate. To ensure a smooth
transition and matched gain at all frequencies, adjust R
b
for a minimum op amp output swing with a 0.1V
pp
sinewave input (to the KH104) at the frequency f
45
. Since
the KH104 has a 50
output voltage is a function of the load impedance
(A
v
~ 10R
L
/(R
L
+ 50)), whereas the gain of the compos-
ite amplifier at low frequencies and DC is relatively
independent of the load impedance, due to the high
open-loop gain of the op amp.
mismatching and phase non-linearity, use the composite
amplifier only if the load impedance is constant from DC
to at least 10(f
45
).
output impedance, its
Thus, to avoid gain
Use of a composite amplifier reduces input offset voltage
and its corresponding drift, but has no effect on input bias
current. This current is converted to an input voltage by
the resistance to ground seen at the amplifier input and
the voltage appears, amplified, at the output.
input offset voltage due to the bias current is 2mV and
input offset drift is approximately 15mV/
°
C.
Typical
Thermal Considerations
The KH104 case must be maintained at or below 140
°
C.
Note that because of the amplifier design, power dissipa-
tion remains fairly constant, independent of the load or
drive level. Therefore, standard derating is not possible.
There are two ways to keep the case temperature low.
The first is to keep the amount of power dissipated inside
the package to a minimum and the second is to get the
heat out of the package quickly by reducing the thermal
resistance from case to ambient.
A large portion of the heat dissipated inside the package
is in the voltage regulators. At the minimum +9V supply
level the regulators dissipate 390mW and at the
maximum ±16V supply level they dissipate 1.2W.
The amplifier itself dissipates a fairly constant 600mW
(55mA x 10.8V). Reducing the power dissipation of the
internal regulators will go far towards reducing the
internal junction temperatures without impacting the so
performance. Reducing either the input supply voltages
(on pins 1 and 2) and/or shunting the regulator current
through external resistors (from pins 1 to 14 and pins
2 to 13) are both effective means towards significantly
reducing the internal power dissipation. A minimum
2.2
μ
F
0.01
μ
F
V
in
115
D1
5.6V
+15V
2.2
μ
F
0.01
μ
F
115
D2
5.6V
-15V
1
2
13
14
V
o
+
+
2.2
μ
F
0.01
μ
F
V
in
200
+15V
2.2
μ
F
0.01
μ
F
200
-15V
1
2
13
14
V
o
+
+
60
60
D1, D2 IN4734
nominal, no load P
d
~
–
760mW
nominal, no load P
d
~
–
900mW
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