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參數(shù)資料
| 型號： | KM4132G271A-10 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 128K x 32Bit x 2 Banks Synchronous Graphic RAM |
| 中文描述： | 128K的x 32Bit的× 2銀行同步圖形內(nèi)存 |
| 文件頁數(shù)： | 17/48頁 |
| 文件大小： | 1000K |
| 代理商： | KM4132G271A-10 |
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KM4132G271A
CMOS SGRAM
Rev.0 (August 1997)
SUMMARY OF 1M Byte SGRAM BASIC FEATURES AND BENEFITS
Features
128K x 32 x 2 SGRAM
Benefits
Interface
Synchronous
Better interaction between memory and system without wait-state of
asynchronous DRAM.
High speed vertical and horizontal drawing.
High operating frequency allows performance gain for SCROLL, FILL,
and BitBLT.
Bank
2 ea
Pseudo-infinite row length by on-chip interleaving operation.
Hidden row activation and precharge.
Page Depth / 1 Row
256 bit
High speed vertical and horizontal drawing.
Total Page Depth
1024 bytes
High speed vertical and horizontal drawing.
Burst Length(Read)
1, 2, 4, 8 Full Page
Programmable burst of 1, 2, ,4, 8 and full page transfer per column
addresses.
Burst Length(Write)
1, 2, 4, 8 Full Page
Programmable burst of 1, 2, ,4, 8 and full page transfer per column
addresses.
BRSW
Switch to burst length of 1 at write without MRS.
Burst Type
Sequential & Interleave
Compatible with Intel and Motorola CPU based system.
CAS Latency
2, 3
Programmable CAS latency.
Block Write
8 Columns
High speed FILL, CLEAR, Text with color registers.
Maximum 32 byte data transfers(e.g. for 8bpp : 32 pixels) with plane and
byte masking functions.
Color Register
1 ea.
A and B bank share.
Mask Register
1 ea.
Write-per-bit capability(bit plane masking). A and B banks share.
Mask function
DQM
0-3
Byte masking(pixel masking for 8bpp system) for data-out/in
Write per bit
Each bit of the mask register directly controls a corresponding bit plane.
Pixel Mask at Block Write
Byte masking(pixel masking for 8bpp system) for color by DQi
WR
D
0
D
1
D
2
D
3
D
0
D
1
D
2
D
3
CLK
CMD
CKE
Internal
CLK
DQ(CL2)
DQ(CL3)
Masked by CKE
D
0
Q
1
Not Written
RD
Q
0
Q
2
Q
0
Q
1
Q
2
Q
3
Masked by CKE
Q
3
Suspended Dout
BASIC FEATURE AND FUNCTION DESCRIPTIONS
1. CLOCK Suspend
Note : CKE to CLK disable/enable=1 clock
2) Clock Suspended During Read (BL=4)
1) Clock Suspended During Write (BL=4)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| KM4132G271A-12 | 128K x 32Bit x 2 Banks Synchronous Graphic RAM |
| KM4132G271A-8 | 128K x 32Bit x 2 Banks Synchronous Graphic RAM |
| KM4132G271A | 128K x 32Bit x 2 Banks Synchronous Graphic RAM |
| KM4132G271BTQ(R)-10 | 128K x 32bit x 2 Banks Synchronous Graphic RAM LVTTL |
| KM4132G271BTQ(R)-7 | 128K x 32bit x 2 Banks Synchronous Graphic RAM LVTTL |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| KM4132G271A-12 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128K x 32Bit x 2 Banks Synchronous Graphic RAM |
| KM4132G271A-8 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128K x 32Bit x 2 Banks Synchronous Graphic RAM |
| KM4132G271AQ-10 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128K x 32Bit x 2 Banks Synchronous Graphic RAM |
| KM4132G271B | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128K x 32bit x 2 Banks Synchronous Graphic RAM LVTTL |
| KM4132G271BQ(R)-10 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128K x 32bit x 2 Banks Synchronous Graphic RAM LVTTL |
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