參數(shù)資料
型號(hào): KM4132G271BTQ(R)-7
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 128K x 32bit x 2 Banks Synchronous Graphic RAM LVTTL
中文描述: 128K的x 32位× 2銀行同步圖形RAM的LVTTL
文件頁(yè)數(shù): 5/51頁(yè)
文件大?。?/td> 1033K
代理商: KM4132G271BTQ(R)-7
KM4132G271B
CMOS SGRAM
- 5 -
Rev. 2.4 (May 1998)
PIN CONFIGURATION DESCRIPTION
PIN
NAME
INPUT FUNCTION
CLK
System Clock
Active on the positive going edge to sample all inputs.
Disables or enables device operation by masking or enabling all inputs except
CLK, CKE and DQMi
CS
Chip Select
CKE
Clock
Enable
Masks system clock to freeze operation from the next clock cycle.
CKE should be enabled at least one clock +t
SS
prior to new command.
Disable input buffers for power down in standby.
A
0
~ A
8
Address
Row / Column addresses are multiplexed on the same pins.
Row address : RA
0
~ RA
8
, Column address : CA
0
~ CA
7
A
9
(BA)
Bank Select Address
Selects bank to be activated during row address latch time.
Selects bank for read/write during column address latch time.
RAS
Row Address Strobe
Latches row addresses on the positive going edge of the CLK with RAS low.
Enables row access & precharge.
CAS
Column Address Strobe
Latches column addresses on the positive going edge of the CLK with CAS low.
Enables column access.
WE
Write Enable
Enables write operation and Row precharge.
DQMi
Data Input/Output Mask
Makes data output Hi-Z, t
SHZ
after the clock and masks the output.
Blocks data input when DQM active.(Byte Masking)
DQi
Data Input/Output
Data inputs/outputs are multiplexed on the same pins.
DSF
V
DD
/V
SS
V
DDQ
/V
SSQ
N.C
Define Special Function
Power Supply /Ground
Data Output Power /Ground
No Connection
Enables write per bit, block write and special mode register set.
Power Supply : +3.3V
±
0.3V/Ground
Provide isolated Power/Ground to DQs for improved noise immunity.
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