參數(shù)資料
型號: KM416V1004C-L6
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 1M x 16Bit CMOS Dynamic RAM with Extended Data Out
中文描述: 100萬× 16的CMOS動態(tài)隨機存儲器的擴展數(shù)據(jù)輸出
文件頁數(shù): 1/35頁
文件大小: 494K
代理商: KM416V1004C-L6
KM416C1004C, KM416C1204C
KM416V1004C, KM416V1204C
CMOS DRAM
This is a family of 1,048,576 x 16 bit Extended Data Out CMOS DRAMs. Extended Data Out Mode offers high speed random access of
memory cells within the same row, so called Hyper Page Mode. Power supply voltage (+5.0V or +3.3V), refresh cycle (1K Ref. or 4K
Ref.), access time (-45, -5 or -6), power consumption(Normal or Low power) and package type(SOJ or TSOP-II) are optional features of
this family. All of this family have CAS-before-RAS refresh, RAS-only refresh and Hidden refresh capabilities. Furthermore, Self-refresh
operation is available in L-version. This 1Mx16 EDO Mode DRAM family is fabricated using Samsung
s advanced CMOS process to
realize high band-width, low power consumption and high reliability. It may be used as graphic memory unit for microcomputer, personal
computer and portable machines.
Part Identification
- KM416C1004C/C-L (5V, 4K Ref.)
- KM416C1204C/C-L (5V, 1K Ref.)
- KM416V1004C/C-L (3.3V, 4K Ref.)
- KM416V1204C/C-L (3.3V, 1K Ref.)
Extended Data Out Mode operation
(Fast Page Mode with Extended Data Out)
2 CAS Byte/Word Read/Write operation
CAS-before-RAS refresh capability
RAS-only and Hidden refresh capability
Self-refresh capability (L-ver only)
TTL(5V)/LVTTL(3.3V) compatible inputs and outputs
Early Write or output enable controlled write
JEDEC Standard pinout
Available in plastic SOJ 400mil and TSOP(II) packages
Single +5V
±
10% power supply (5V product)
Single +3.3V
±
0.3V power supply (3.3V product)
Control
Clocks
VBB Generator
Refresh Timer
Refresh Control
Refresh Counter
Row Address Buffer
Col. Address Buffer
Row Decoder
Column Decoder
Lower
Data out
Buffer
RAS
UCAS
LCAS
W
Vcc
Vss
DQ0
to
DQ7
A0-A11
(A0 - A9)
*1
A0 - A7
(A0 - A9)
*1
Memory Array
1,048,576 x16
Cells
SAMSUNG ELECTRONICS CO., LTD.
reserves the right to
change products and specifications without notice.
1M x 16Bit CMOS Dynamic RAM with Extended Data Out
DESCRIPTION
FEATURES
FUNCTIONAL BLOCK DIAGRAM
Refresh Cycles
Part
NO.
V
CC
Refresh
cycle
Refresh period
Normal
L-ver
C1004C
V1004C
C1204C
V1204C
5V
3.3V
5V
3.3V
4K
64ms
128ms
1K
16ms
Performance Range
Speed
-45
-5
-6
t
RAC
45ns
50ns
60ns
t
CAC
13ns
15ns
17ns
t
RC
69ns
84ns
104ns
t
HPC
16ns
20ns
25ns
Remark
5V/3.3V
5V/3.3V
5V/3.3V
Active Power Dissipation
Speed
3.3V
5V
4K
-
324
288
1K
-
504
468
4K
550
495
440
1K
825
770
715
-45
-5
-6
Unit : mW
S
Upper
Data in
Buffer
Upper
Data out
Buffer
Lower
Data in
Buffer
DQ
8
to
DQ15
OE
Note)
*1
: 1K Refresh
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