參數(shù)資料
型號: KM48C2100B
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 2M x 8Bit CMOS Dynamic RAM with Fast Page Mode
中文描述: 200萬× 8位的CMOS動態(tài)隨機存儲器的快速頁面模式
文件頁數(shù): 1/8頁
文件大?。?/td> 79K
代理商: KM48C2100B
KM48C2000B, KM48C2100B
KM48V2000B, KM48V2100B
CMOS DRAM
This is a family of 2,097,152 x 8 bit Fast Page Mode CMOS DRAMs. Fast Page Mode offers high speed random access of memory cells
within the same row. Power supply voltage (+5.0V or +3.3V), refresh cycle (2K Ref. or 4K Ref.), access time (-5,-6 or -7), power con-
sumption(Normal or Low power) and package type(SOJ or TSOP-II) are optional features of this family. All of this family have CAS-
before-RAS refresh, RAS-only refresh and Hidden refresh capabilities. Furthermore, Self-refresh operation is available in L-version.
This 2Mx8 Fast Page Mode DRAM family is fabricated using Samsung's advanced CMOS process to realize high band-width, low power
consumption and high reliability.
It may be used as graphic memory unit for microcomputer, personal computer and portable machines.
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Part Identification
- KM48C2000B/B-L (5V, 4K Ref.)
- KM48C2100B/B-L (5V, 2K Ref.)
- KM48V2000B/B-L (3.3V, 4K Ref.)
- KM48V2100B/B-L (3.3V, 2K Ref.)
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Fast Page Mode operation
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Byte/Word Read/Write operation
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CAS-before-RAS refresh capability
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RAS-only and Hidden refresh capability
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Self-refresh capability (L-ver only)
ü
Fast parallel test mode capability
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TTL(5V)/LVTTL(3.3V) compatible inputs and outputs
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Early Write or output enable controlled write
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JEDEC Standard pinout
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Available in Plastic SOJ and TSOP(II) packages
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Single +5V
10% power supply (5V product)
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Single +3.3V
0.3V power supply (3.3V product)
Control
Clocks
VBB Generator
Refresh Timer
Refresh Control
Refresh Counter
Row Address Buffer
Col. Address Buffer
Row Decoder
Column Decoder
RAS
CAS
W
Vcc
Vss
DQ0
to
DQ7
A0-A11
(A0 - A10)
*1
A0 - A8
(A0 - A9)
*1
Memory Array
2,097,152 x 8
Cells
SAMSUNG ELECTRONICS CO., LTD.
reserves the right to
change products and specifications without notice.
2M x 8Bit CMOS Dynamic RAM with Fast Page Mode
DESCRIPTION
FEATURES
FUNCTIONAL BLOCK DIAGRAM
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Refresh Cycles
Part
NO.
V
CC
Refresh
cycle
Refresh period
Normal
L-ver
C2000B
V2000B
C2100B
V2100B
5V
3.3V
5V
3.3V
4K
64ms
128ms
2K
32ms
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Performance Range
Speed
-5
-6
-7
t
RAC
50ns
60ns
70ns
t
CAC
13ns
15ns
20ns
t
RC
90ns
110ns
130ns
t
PC
35ns
40ns
45ns
Remark
5V/3.3V
5V/3.3V
5V/3.3V
ü
Active Power Dissipation
Speed
3.3V
5V
4K
324
288
252
2K
396
360
324
4K
495
440
385
2K
605
550
495
-5
-6
-7
Unit : mW
S
Data out
Buffer
Data in
Buffer
OE
Note)
*1
: 2K Refresh
相關(guān)PDF資料
PDF描述
KM48V2000B 2M x 8Bit CMOS Dynamic RAM with Fast Page Mode
KM48V2100B 2M x 8Bit CMOS Dynamic RAM with Fast Page Mode
KM48C2100C 2M x 8Bit CMOS Dynamic RAM with Fast Page Mode(2M x 8位CMOS 動態(tài)RAM(帶快速頁模式))
KM48V2000C 2M x 8Bit CMOS Dynamic RAM with Fast Page Mode(2M x 8位CMOS 動態(tài)RAM(帶快速頁模式))
KM48C2000C 2M x 8Bit CMOS Dynamic RAM with Fast Page Mode(2M x 8位CMOS 動態(tài)RAM(帶快速頁模式))
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