參數(shù)資料
型號: KM48C2104C
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 2M x 8Bit CMOS Dynamic RAM with Extended Data Out(2M x 8位CMOS 動態(tài)RAM(帶擴展數(shù)據(jù)輸出))
中文描述: 200萬× 8位的擴展數(shù)據(jù)輸出的CMOS動態(tài)RAM(2米× 8位的CMOS動態(tài)隨機存儲器(帶擴展數(shù)據(jù)輸出))
文件頁數(shù): 4/21頁
文件大小: 367K
代理商: KM48C2104C
KM48C2004C, KM48C2104C
KM48V2004C, KM48V2104C
CMOS DRAM
*Note :
I
CC1
, I
CC3
, I
CC4
and I
CC6
are dependent on output loading and cycle rates. Specified values are obtained with the output open.
I
CC
is specified as an average current. In I
CC1
, I
CC3
and I
CC6,
address can be changed maximum once while RAS=V
IL
. In I
CC4
,
address can be changed maximum once within one Hyper page mode cycle time, t
HPC
.
DC AND OPERATING CHARACTERISTICS
(Continued)
I
CC1
* : Operating Current (RAS and CAS cycling @t
RC
=min.)
I
CC2
: Standby Current (RAS=CAS=W=V
IH
)
I
CC3
* : RAS-only Refresh Current (CAS=V
IH
, RAS cycling @t
RC
=min.)
I
CC4
* : Hyper Page Mode Current (RAS=V
IL
, CAS, Address cycling @t
HPC
=min.)
I
CC5
: Standby Current (RAS=CAS=W=V
CC
-0.2V)
I
CC6
* : CAS-Before-RAS Refresh Current (RAS and CAS cycling @t
RC
=min.)
I
CC7
: Battery back-up current, Average power supply current, Battery back-up mode
Input high voltage(V
IH
)=V
CC
-0.2V, Input low voltage(V
IL
)=0.2V, CAS=0.2V,
DQ=Don
t care, T
RC
=31.25us(4K/L-ver), 62.5us(2K/L-ver),
T
RAS
=T
RAS
min~300ns
I
CCS
: Self Refresh Current
RAS=CAS=V
IL
, W=OE=A0 ~ A11=V
CC
-0.2V or 0.2V,
DQ0 ~ DQ7=V
CC
-0.2V, 0.2V or Open
Symbol
Power
Speed
Max
Units
KM48V2004C
KM48V2104C
KM48C2004C
KM48C2104C
I
CC1
Don
t care
-5
-6
90
80
110
100
90
80
110
100
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
uA
mA
mA
mA
uA
uA
I
CC2
Normal
L
Don
t care
1
1
1
1
2
1
2
1
I
CC3
Don
t care
-5
-6
90
80
110
100
90
80
110
100
I
CC4
Don
t care
-5
-6
80
70
90
80
80
70
90
80
I
CC5
Normal
L
Don
t care
0.5
200
0.5
200
1
250
1
250
I
CC6
Don
t care
-5
-6
90
80
110
100
90
80
110
100
I
CC7
I
CCS
L
L
Don
t care
Don
t care
250
200
250
200
300
250
300
250
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