參數(shù)資料
型號: KM68V1002BI
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 128K x 8 Bit High-Speed CMOS Static RAM(3.3V Operating)(128K x 8位高速CMOS 靜態(tài) RAM)
中文描述: 128K的× 8位高速CMOS靜態(tài)RAM(3.3V的工作)(128K的× 8位高速的CMOS靜態(tài)RAM)的
文件頁數(shù): 2/9頁
文件大小: 138K
代理商: KM68V1002BI
KM68V1002B/BL, KM68V1002BI/BLI
CMOS SRAM
PRPreliminary
Rev 2.1
- 2 -
August 1998
128K x 8 Bit High-Speed CMOS Static RAM(3.3V Operating)
GENERAL DESCRIPTION
The KM68V1002B is a 1,048,576-bit high-speed Static Ran-
dom Access Memory organized as 131,072 words by 8 bits.
The KM68V1002B uses 8 common input and output lines and
has an output enable pin which operates faster than address
access time at read cycle. The device is fabricated using SAM-
SUNG
s advanced CMOS process and designed for high-
speed circuit technology. It is particularly well suited for use in
high-density
high-speed
system
KM68V1002B is packaged in a 400mil 32-pin plastic SOJ or
TSOP2 forward.
FEATURES
Fast Access Time 8,10,12ns(Max.)
Low Power Dissipation
Standby (TTL) : 50mA(Max.)
(CMOS) : 5mA(Max.)
0.7mA(Max.) - L-Ver. only
Operating KM68V1002B/BL - 8 : 160mA(Max.)
KM68V1002B/BL - 10 : 155mA(Max.)
KM68V1002B/BL - 12 : 150mA(Max.)
Single 3.3
±
0.3V Power Supply
TTL Compatible Inputs and Outputs
Fully Static Operation
- No Clock or Refresh required
Three State Outputs
2V Minimum Data Retention ; L-Ver. only
Center Power/Ground Pin Configuration
Standard Pin Configuration
KM68V1002BJ : 32-SOJ-400
KM68V1002BT : 32-TSOP2-400F
KM68V1002B/BL -8/10/12
Commercial Temp.
KM68V1002BI/BLI -8/10/12
Industrial Temp.
ORDERING INFORMATION
Clk Gen.
I/O
1
~I/O
8
CS
WE
OE
R
Data
Cont.
Column Select
CLK
Gen.
Pre-Charge Circuit
Memory Array
256 Rows
512x8 Columns
I/O Circuit
PIN FUNCTION
Pin Name
Pin Function
A
0
- A
16
Address Inputs
WE
Write Enable
CS
Chip Select
OE
Output Enable
I/O
1
~ I/O
8
Data Inputs/Outputs
V
CC
Power(+3.3V)
V
SS
Ground
N.C
No Connection
applications.
The
PIN CONFIGURATION
(Top View)
SOJ/
TSOP2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A
16
A
15
A
14
A
13
OE
I/O
8
I/O
7
Vss
Vcc
I/O
6
I/O
5
A
12
A
11
A
10
A
9
A
8
A
0
A
1
A
2
A
3
CS
I/O
1
I/O
2
Vcc
Vss
I/O
3
I/O
4
WE
A
4
A
5
A
6
A
7
FUNCTIONAL BLOCK DIAGRAM
A
10
A
11
A
12
A
13
A
14
A
15
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
A
9
A
16
相關(guān)PDF資料
PDF描述
KM68V1002C 128K x 8 Bit High-Speed CMOS Static RAM(3.3V Operating)(128K x 8位高速CMOS 靜態(tài) RAM)
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