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參數(shù)資料
| 型號： | KMM364C400CK |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 4Mx64 DRAM DIMM(4Mx64 動態(tài) RAM模塊) |
| 中文描述： | 4Mx64的DRAM內(nèi)存（4Mx64動態(tài)內(nèi)存模塊） |
| 文件頁數(shù)： | 6/19頁 |
| 文件大小： | 347K |
| 代理商： | KMM364C400CK |
DRAM MODULE
KMM364C410CK/CS
KMM364C400CK/CS
NOTES
An initial pause of 200us is required after power-up followed
by any 8 RAS-only or CAS-before-RAS refresh cycles before
proper device operation is achieved.
Input voltage levels are Vih/Vil. V
IH
(min) and V
IL
(max) are
reference levels for measuring timing of input signals. Transi-
tion times are measured between V
IH
(min) and V
IL
(max) and
are assumed to be 5ns for all inputs.
Measured with a load equivalent to 2TTL loads and 100pF.
Operation within the
t
RCD
(max) limit insures that
t
RAC
(max)
can be met.
t
RCD
(max) is specified as a reference point only.
If
t
RCD
is greater than the specified
t
RCD
(max) limit, then
access time is controlled exclusively by
t
CAC
.
Assumes that
t
RCD
≥
t
RCD
(max).
This parameter defines the time at which the output achieves
the open circuit condition and is not referenced to V
OH
or
V
OL
.
t
WCS
is not restrictive operating parameter. It included in the
data sheet as electrical characteristic only. If
t
WCS
≥
t
WCS
(min)
the cycle is an early write cycle and the data out pin will
remain high impedance for the duration of the cycle.
Either
t
RCH
or
t
RRH
must be satisfied for a read cycle.
These parameters are referenced to the CAS leading edge in
early write cycles.
Operation within the
t
RAD
(max) limit insures that
t
RAC
(max)
can be met.
t
RAD
(max) is specified as reference point only. If
t
RAD
is greater than the specified
t
RAD
(max) limit, then
access time is controlled by
t
AA
.
The timing skew from the DRAM to the DIMM resulted from
the addition of buffers.
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| KMM364C410CK | 4Mx64 DRAM DIMM(4Mx64 動態(tài) RAM模塊) |
| KMM364E213BK | 2M x 64 DRAM DIMM(2M x 64 動態(tài) RAM模塊) |
| KMM364E213CK | 2M x 64 DRAM DIMM(2M x 64 動態(tài) RAM模塊) |
| KMM364E400CK | 4Mx64 DRAM DIMM(4Mx64 動態(tài) RAM模塊) |
| KMM364E410CK | 4Mx64 DRAM DIMM(4Mx64 動態(tài) RAM模塊) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| KMM366S1623AT | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:16Mx64 SDRAM DIMM based on 8Mx8 4Banks, 4K Refresh, 3.3V Synchronous DRAMs with SPD |
| KMM366S1623AT-G0 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:16Mx64 SDRAM DIMM based on 8Mx8 4Banks, 4K Refresh, 3.3V Synchronous DRAMs with SPD |
| KMM366S1623AT-G2 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:16Mx64 SDRAM DIMM based on 8Mx8 4Banks, 4K Refresh, 3.3V Synchronous DRAMs with SPD |
| KMM366S1623AT-G8 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:16Mx64 SDRAM DIMM based on 8Mx8 4Banks, 4K Refresh, 3.3V Synchronous DRAMs with SPD |
| KMM366S1623BT | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:PC100 SDRAM MODULE |
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